}8w(v+hisilicon,hi3660-hikey960hisilicon,hi3660 + 7HiKey960psci arm,psci-0.2=smccpus+cpu-mapcluster0core0Dcore1Dcore2Dcore3Dcluster1core0Dcore1Dcore2Dcore3D cpu@0arm,cortex-a53arm,armv8HcpuTXpscif w Pcpu@1arm,cortex-a53arm,armv8HcpuTXpscif w Pcpu@2arm,cortex-a53arm,armv8HcpuTXpscif w Pcpu@3arm,cortex-a53arm,armv8HcpuTXpscif w Pcpu@100arm,cortex-a73arm,armv8HcpuTXpscif  w cpu@101arm,cortex-a73arm,armv8HcpuTXpscif  w cpu@102arm,cortex-a73arm,armv8HcpuTXpscif  w cpu@103arm,cortex-a73arm,armv8HcpuTXpscif  w  idle-statespscicpu-naparm,idle-statecpu-sleeparm,idle-state(F  cluster-sleep-0arm,idle-stateN  cluster-sleep-1arm,idle-stateN l2-cache0cache l2-cache1cache interrupt-controller@e82b0000 arm,gic-400@T++ +@ +`   / a53-pmuarm,cortex-a53-pmu0/:a73-pmuarm,cortex-a73-pmu0/: timerarm,armv8-timer 0/   soc simple-bus+Mcrg_ctrl@fff35000 hisilicon,hi3660-crgctrlsysconTPTcrg_rst_controllerhisilicon,hi3660-resetanpctrl@e8a09000hisilicon,hi3660-pctrlsysconT蠐 Tcrg_ctrl@fff34000 hisilicon,hi3660-pmuctrlsysconT@Tsctrl@fff0a000hisilicon,hi3660-sctrlsysconTT0iomcu@ffd7e000hisilicon,hi3660-iomcusysconTTresethisilicon,hi3660-resetnatimer@fff14000arm,sp804arm,primecellT@/01~   timer1timer2apb_pclki2c@ffd71000snps,designware-i2cT /v+~  defaultokayLS-I2C0i2c@ffd72000snps,designware-i2cT  /w+~  defaultokayadv7533@39ok adi,adv7533T9i2c@fdf0c000snps,designware-i2cT /Q+~7 xdefault disabledi2c@fdf0b000snps,designware-i2cT /:+~6 `defaultokayLS-I2C1serial@fdf02000arm,pl011arm,primecellT  /J~huartclkapb_pclkdefault disabledserial@fdf00000arm,pl011arm,primecellT /K~99uartclkapb_pclkdefault disabledserial@fdf03000arm,pl011arm,primecellT0 /L~:uartclkapb_pclkdefault ! disabledserial@ffd74000arm,pl011arm,primecellT@ /r~uartclkapb_pclkdefault"#okay LS-UART0serial@fdf01000arm,pl011arm,primecellT /M~;;uartclkapb_pclkdefault$%okaybluetooth ti,wl1837-st &-serial@fdf05000arm,pl011arm,primecellTP /N~<<uartclkapb_pclkdefault'( disabledserial@fff32000arm,pl011arm,primecellT  /O~ uartclkapb_pclkdefault)*okay LS-UART1dma@fdf30000hisilicon,k3-dma-1.0T   /~> !hi3660_dmartc@fff04000arm,pl031arm,primecellT@ /.~ apb_pclkgpio@e8a0b000arm,pl061arm,primecellT蠰 /T*:F+ ~ apb_pclkLRTP901[PMU0_SSI][PMU1_SSI][PMU2_SSI][PMU0_CLKOUT][JTAG_TCK][JTAG_TMS]gpio@e8a0c000arm,pl061arm,primecellT /U*:F+ ~  apb_pclkCR[JTAG_TRST_N][JTAG_TDI][JTAG_TDO]NCNC[I2C3_SCL][I2C3_SDA]NCgpio@e8a0d000arm,pl061arm,primecellT /V*:F+ ~! apb_pclkGRNCNCNCGPIO-JGPIO_020_HDMI_SELGPIO-LGPIO_022_UFSBUCK_INT_NGPIO-Ggpio@e8a0e000arm,pl061arm,primecellT /W*:F+ ~" apb_pclkJR[CSI0_MCLK][CSI1_MCLK]NC[I2C2_SCL][I2C2_SDA][I2C3_SCL][I2C3_SDA]NCgpio@e8a0f000arm,pl061arm,primecellT /X*:F+ ~# apb_pclkARNCNCPWR_BTN_NGPIO_035_PMU2_ENGPIO_036_USB_HUB_RESETNCNCNCDgpio@e8a10000arm,pl061arm,primecellT /Y*:F+& ~$ apb_pclkQRGPIO-HGPIO_041_HDMI_PDTP904TP905NCNCGPIO_046_HUB_VDD33_ENGPIO_047_PMU1_ENgpio@e8a11000arm,pl061arm,primecellT /Z*:F+. ~% apb_pclkARNCNCNCGPIO_051_WIFI_ENGPIO-I[SD_DAT1][SD_DAT2][UART1_RXD]Fgpio@e8a12000arm,pl061arm,primecellT  /[*:F+6 ~& apb_pclkyR[UART1_TXD][UART0_CTS][UART0_RTS][UART0_RXD][UART0_TXD][SOC_BT_UART4_CTS_N][SOC_BT_UART4_RTS_N][SOC_BT_UART4_RXD]gpio@e8a13000arm,pl061arm,primecellT0 /\*:F+> ~' apb_pclk?R[SOC_BT_UART4_TXD]NC[PMU_HKADC_SSI]NCGPIO_068_SELNCNCNCgpio@e8a14000arm,pl061arm,primecellT@ /]*:F+F ~( apb_pclkRNCNCNCGPIO-KNCNCNCNCgpio@e8a15000arm,pl061arm,primecellTP /^*:F+N ~) apb_pclkRNCNCNCNCNCNCNCNCgpio@e8a16000arm,pl061arm,primecellT` /_*:F+V ~* apb_pclk$RNC[PCIE_PERST_N]NCNCNCNCNCNC5gpio@e8a17000arm,pl061arm,primecellTp /`*: F+^+e ~+ apb_pclkRNCNCNCNCgpio@e8a18000arm,pl061arm,primecellT血 /a*:F+f ~, apb_pclkRNCNCNCNCNCNCNCNCgpio@e8a19000arm,pl061arm,primecellT衐 /b*:F+n ~- apb_pclkRNCNCNCNCNCNCNCNCgpio@e8a1a000arm,pl061arm,primecellT衠 /c*:F+v ~. apb_pclk'RNCNCNCNCNCNCGPIO_126_BT_ENTP902&gpio@e8a1b000arm,pl061arm,primecellT衰 /d*: ~/ apb_pclkRgpio@e8a1c000arm,pl061arm,primecellT /e*: ~0 apb_pclkRgpio@ff3b4000arm,pl061arm,primecellT;@ /f*:F, ~1 apb_pclkmR[UFS_REF_CLK][UFS_RST_N][SPI1_SCLK][SPI1_DIN][SPI1_DOUT][SPI1_CS]GPIO_150_USER_LED1GPIO_151_USER_LED24gpio@ff3b5000arm,pl061arm,primecellT;P /g*:F, ~2 apb_pclkRNCNCNCNCgpio@e8a1f000arm,pl061arm,primecellT /h*:F- ~3 apb_pclk@R[SD_CLK][SD_CMD][SD_DATA0][SD_DATA1][SD_DATA2][SD_DATA3]gpio@e8a20000arm,pl061arm,primecellT /i*: F.~4 apb_pclk^R[WL_SDIO_CLK][WL_SDIO_CMD][WL_SDIO_DATA0][WL_SDIO_DATA1][WL_SDIO_DATA2][WL_SDIO_DATA3]gpio@fff0b000arm,pl061arm,primecellT /j*:F/ ~0 apb_pclkdR[GPIO_176_PMU_PWR_HOLD]NA[SYSCLK_EN]GPIO_179_WL_WAKEUP_APGPIO_180_HDMI_INTNAGPIO-F[I2C0_SCL]@gpio@fff0c000arm,pl061arm,primecellT /k*:F/ ~0 apb_pclk^R[I2C0_SDA][I2C1_SCL][I2C1_SDA][I2C1_SCL][I2C1_SDA]GPIO_189_USER_LED3GPIO_190_USER_LED4Egpio@fff0d000arm,pl061arm,primecellT /l*:F/  ~0 apb_pclktR[PCM_DI][PCM_DO][PCM_CLK][PCM_FS][GPIO_196_I2S2_DI][GPIO_197_I2S2_DO][GPIO_198_I2S2_XCLK][GPIO_199_I2S2_XFS]gpio@fff0e000arm,pl061arm,primecellT /m*: F// ~0 apb_pclkzRNCNCGPIO_202_VBUS_TYPECGPIO_203_SD_DETGPIO_204_PMU12_IRQ_NGPIO_205_WIFI_ACTIVEGPIO_206_USBSW_SELGPIO_207_BT_ACTIVE6gpio@fff0f000arm,pl061arm,primecellT /n*:F/ ~0 apb_pclkLRGPIO-AGPIO-BGPIO-CGPIO-DGPIO-E[PCIE_CLKREQ_N][PCIE_WAKE_N][SPI0_CLK]gpio@fff10000arm,pl061arm,primecellT /o*:F/$ ~0 apb_pclkBR[SPI0_DIN][SPI0_DOUT][SPI0_CS]GPIO_219_CC_INTNCNC[PMU_INT]2gpio@fff1d000arm,pl061arm,primecellT /*: ~0 apb_pclkRspi@ffd68000arm,pl022arm,primecellTր+ /t~ apb_pclkdefault1b i2okayLS-SPI0spi@ff3b3000arm,pl022arm,primecellT;0+ /8~5 apb_pclkdefault3b i4okayHS-SPI1pcie@f4000000hisilicon,kirin960-pcie@T? rdbiapbphyconfig|+HpciM (~RSQP:pcie_phy_refpcie_auxpcie_apb_phypcie_apb_syspcie_aclk 5dwmmc1@ff37f000+hisilicon,hi3660-dw-mshc T7 /~Kciubiu0 reset *630default 789O\ivokay:;slot@0Tdwmmc2@ff3ff000hisilicon,hi3660-dw-mshcT? /~Lciubiu reset default <=>ok?+wlcore@2 ti,wl1837T @/watchdog@e8a06000arm,sp805-wdtarm,primecellT` /,~  apb_pclkwatchdog@e8a07000arm,sp805-wdtarm,primecellTp /-~  apb_pclktsensor@fff30000hisilicon,hi3660-tsensorT /gpio-rangeApinmux@e896c000pinctrl-singleT& D aAAt+pmu_pmx_func { csi0_pwd_n_pmx_func{Dcsi1_pwd_n_pmx_func{Lisp0_pmx_func{Xdhisp1_pmx_func{\lppwr_key_pmx_func{Bi2c3_pmx_func{,0i2c4_pmx_func{pcie_perstn_pmx_func{\usbhub5734_pmx_func{ uart0_pmx_func{uart1_pmx_func {uart2_pmx_func { uart3_pmx_func {"uart4_pmx_func {$uart5_pmx_func {'uart6_pmx_func {)cam0_rst_pmx_func{cam1_rst_pmx_func{$pinmux@ff37e000pinctrl-singleT7& DaA-sd_pmx_func0{ 7pinmux@ff3b6000pinctrl-singleT;`0& DaA ,ufs_pmx_func{spi3_pmx_func { 3pinmux@ff3fd000pinctrl-singleT?& DaA.sdio_pmx_func0{ <pinmux@fff11000pinctrl-singleT& DaA*/i2s2_pmx_func {DHLPslimbus_pmx_func{,0i2c0_pmx_func{i2c1_pmx_func{ i2c7_pmx_func{$(pcie_pmx_func{spi2_pmx_func {1i2s0_pmx_func {48<@pinmux@e896c800pinconf-singleT& pmu_cfg_func {  i2c3_cfg_func{8<csi0_pwd_n_cfg_func{Pcsi1_pwd_n_cfg_func{Xisp0_cfg_func{dptisp1_cfg_func{hx|pwr_key_cfg_func{Cuart1_cfg_func {uart2_cfg_func {!uart5_cfg_func {(cam0_rst_cfg_func{uart0_cfg_func{uart6_cfg_func {*uart3_cfg_func {#uart4_cfg_func {%cam1_rst_cfg_func{0pinmux@ff3b6800pinconf-singleT;h& ufs_cfg_func{0spi3_cfg_func{pinmux@ff3fd800pinconf-singleT?& sdio_clk_cfg_func{=sdio_cfg_func({ >pinmux@ff37e800pinconf-singleT7& sd_clk_cfg_func{8sd_cfg_func({ 9pinmux@fff11800pinconf-singleT& i2c0_cfg_func{ i2c1_cfg_func{$(i2c7_cfg_func{,0slimbus_cfg_func{48i2s0_cfg_func {@DHLi2s2_cfg_func {PTX\pcie_cfg_func{spi2_cfg_func {usb_cfg_func{aliases/soc/dwmmc1@ff37f000/soc/dwmmc2@ff3ff000/soc/serial@fdf02000/soc/serial@fdf00000/soc/serial@fdf03000 /soc/serial@ffd74000/soc/serial@fdf01000/soc/serial@fdf05000!/soc/serial@fff32000chosen)serial6:115200n8memory@0HmemoryTreserved-memory+Mramoops@32000000ramoopsT25ANreboot-mode-syscon@32100000sysconsimple-mfdT2reboot-modesyscon-reboot-modeZawfUmwfU}wfUkeys gpio-keysdefaultBCpower D GPIO Powertleds gpio-ledsuser_led1 user_led1 4 heartbeatuser_led2 user_led2 4mmc0user_led3 user_led3 Eoffuser_led4 user_led4 Ecpu0wlan_active_led wifi_active 6phy0txoffbt_active_led bt_active 6 hci0-poweroffpmic@fff34000hisilicon,hi6421v530-pmicT@ regulatorsLDO3 VOUT3_1V85w@!xLDO9VOUT9_1V8_2V952Z;LDO11VOUT11_1V8_2V952ZLDO15 VOUT15_3V0-3ExLDO16 VOUT16_2V95-h:wlan-en-1-8vregulator-fixedwlan-en-regulatorw@w@ YF^po?firmwareopteelinaro,optee-tz=smc compatibleinterrupt-parent#address-cells#size-cellsmodelmethodcpudevice_typeregenable-methodnext-level-cachecpu-idle-statescapacity-dmips-mhzphandleentry-methodarm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uslocal-timer-stop#interrupt-cellsinterrupt-controllerinterruptsinterrupt-affinityranges#clock-cells#reset-cellshisi,rst-sysconclocksclock-namesclock-frequencyresetspinctrl-namespinctrl-0statuslabelenable-gpiosmax-speed#dma-cellsdma-channelsdma-requestsdma-min-chandma-no-ccidma-typegpio-controller#gpio-cellsgpio-rangesgpio-line-namesnum-cscs-gpiosreg-namesbus-rangenum-lanesinterrupt-map-maskinterrupt-mapreset-gpioscd-invertednum-slotsbus-widthdisable-wpcap-sd-highspeedsupports-highspeedcard-detect-delayreset-namescd-gpioshisilicon,peripheral-sysconsd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50sd-uhs-sdr104vmmc-supplyvqmmc-supplykeep-power-in-suspendbroken-cdti,non-removable#thermal-sensor-cells#pinctrl-single,gpio-range-cells#pinctrl-cells#gpio-range-cellspinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,gpio-rangepinctrl-single,pinspinctrl-single,bias-pulldownpinctrl-single,bias-pulluppinctrl-single,drive-strengthmshc1mshc2serial0serial1serial2serial3serial4serial5serial6stdout-pathrecord-sizeconsole-sizeftrace-sizeoffsetmode-normalmode-bootloadermode-recoverywakeup-sourcelinux,codelinux,default-triggerdefault-statepanic-indicatorregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-enable-ramp-delayregulator-boot-onregulator-always-ongpiostartup-delay-usenable-active-high