ˠ8( t'tsd,rk3399-puma-haikourockchip,rk3399 + 7Theobroma Systems RK3399-Q7 SoMaliases=/ethernet@fe300000G/i2c@ff3c0000L/i2c@ff110000Q/i2c@ff120000V/i2c@ff130000[/i2c@ff3d0000`/i2c@ff140000e/i2c@ff150000j/i2c@ff160000o/i2c@ff3e0000t/serial@ff180000|/serial@ff190000/serial@ff1a0000/serial@ff1b0000/serial@ff370000cpus+cpu-mapcluster0core0core1core2core3cluster1core0core1cpu@0cpuarm,cortex-a53arm,armv8pscid   cpu@1cpuarm,cortex-a53arm,armv8pscid   cpu@2cpuarm,cortex-a53arm,armv8pscid   cpu@3cpuarm,cortex-a53arm,armv8pscid   cpu@100cpuarm,cortex-a72arm,armv8psci    cpu@101cpuarm,cortex-a72arm,armv8psci    display-subsystemrockchip,display-subsystem pmu_a53arm,cortex-a53-pmupmu_a72arm,cortex-a72-pmupsci arm,psci-1.0smctimerarm,armv8-timer@   &xin24m fixed-clock=n6Mxin24m`amba simple-bus+mdma-controller@ff6d0000arm,pl330arm,primecellm@ t apb_pclk dma-controller@ff6e0000arm,pl330arm,primecelln@ t apb_pclkpcie@f8000000rockchip,rk3399-pcie axi-baseapb-base+ Gaclkaclk-perfhclkpm0123syslegacyclient`  ,pcie-phy-0pcie-phy-1pcie-phy-2pcie-phy-38m8$(+coremgmtmgmt-stickypipepmpclkaclk7okay >GQdefault_interrupt-controlleri ethernet@fe300000rockchip,rk3399-gmac0 macirq8ighfjfMstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac~$ +stmmaceth7okayinputrgmiiQdefault_  'P%dwmmc@fe3100000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc1@@.р Mbiuciuciu-driveciu-sample<~$y+reset 7disableddwmmc@fe3200000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc2@A.рG  Lbiuciuciu-driveciu-sample<~$z+reset7okay\bl~ Qdefault_ !"sdhci@fe330000+rockchip,rk3399-sdhci-5.1arasan,sdhci-5.13 NG Nclk_xinclk_ahbMemmc_cardclock`# phy_arasan~7okayb usb@fe380000 generic-ehci8$usbhostarbiterutmi%usb7okayusb@fe3a0000 generic-ohci:$usbhostarbiterutmi%usb7okayusb@fe3c0000 generic-ehci<&usbhostarbiterutmi'usb7okayusb@fe3e0000 generic-ohci> &usbhostarbiterutmi'usb7okayusb@fe800000rockchip,rk3399-dwc3+m0Gref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk$% +usb3-otg7okaydwc3 snps,dwc3iotg()usb2-phyusb3-phy utmi_wide %F_~7okayusb@fe900000rockchip,rk3399-dwc3+m0Gref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk$& +usb3-otg7okaydwc3 snps,dwc3nhost*+usb2-phyusb3-phy utmi_wide %F_~7okaydp@fec00000rockchip,rk3399-cdn-dp rG  ruocore-clkpclkspdifgrf,-~ $HJ+spdifdptxapbcore 7disabledportsport+endpoint@0. endpoint@1/ interrupt-controller@fee00000 arm,gic-v3+miP   interrupt-controller@fee20000arm,gic-v3-its ppi-partitionsinterrupt-partition-0 interrupt-partition-1 saradc@ff100000rockchip,rk3399-saradc>Pesaradcapb_pclk$ +saradc-apb 7disabledi2c@ff110000rockchip,rk3399-i2cAG AU i2cpclk;Qdefault_0+7okay=i2c@ff120000rockchip,rk3399-i2cBG BV i2cpclk#Qdefault_1+7okay=i2c@ff130000rockchip,rk3399-i2cCG CW i2cpclk"Qdefault_2+7okay i2c@ff140000rockchip,rk3399-i2cDG DX i2cpclk&Qdefault_3+ 7disabledi2c@ff150000rockchip,rk3399-i2cEG EY i2cpclk%Qdefault_4+7okay=i2c@ff160000rockchip,rk3399-i2cFG FZ i2cpclk$Qdefault_5+7okay=fan@18 ti,amc6821. rtc@6f isil,isl1208oserial@ff180000&rockchip,rk3399-uartsnps,dw-apb-uartQ`baudclkapb_pclkc@JQdefault _6787okayserial@ff190000&rockchip,rk3399-uartsnps,dw-apb-uartRabaudclkapb_pclkb@JQdefault_9 7disabledserial@ff1a0000&rockchip,rk3399-uartsnps,dw-apb-uartSbbaudclkapb_pclkd@JQdefault_:7okayserial@ff1b0000&rockchip,rk3399-uartsnps,dw-apb-uartTcbaudclkapb_pclke@JQdefault_; 7disabledspi@ff1c0000(rockchip,rk3399-spirockchip,rk3066-spiG[spiclkapb_pclkDQdefault_<=>?+ 7disabledspi@ff1d0000(rockchip,rk3399-spirockchip,rk3066-spiH\spiclkapb_pclk5Qdefault_@ABC+7okayflash@0jedec,spi-norWspi@ff1e0000(rockchip,rk3399-spirockchip,rk3066-spiI]spiclkapb_pclk4Qdefault_DEFG+ 7disabledspi@ff1f0000(rockchip,rk3399-spirockchip,rk3066-spiJ^spiclkapb_pclkCQdefault_HIJK+ 7disabledspi@ff200000(rockchip,rk3399-spirockchip,rk3066-spi K_spiclkapb_pclkQdefault_LMNO~+7okaythermal-zonescpuidPtripscpu_alert0ppassive Qcpu_alert1$passive Rcpu_crits criticalcooling-mapsmap0Q map1RgpuidPtripsgpu_alert0$passive Sgpu_crits criticalcooling-mapsmap0S tsadc@ff260000rockchip,rk3399-tsadc&aOG qOdtsadcapb_pclk$ +tsadc-apbsQinitdefaultsleep_TUT7okay   Pqos@ffa58000syscon  ]qos@ffa5c000syscon  ^qos@ffa60080syscon qos@ffa60100syscon qos@ffa60180syscon qos@ffa70000syscon  aqos@ffa70080syscon  bqos@ffa74000syscon@  _qos@ffa76000syscon`  `qos@ffa90000syscon  cqos@ffa98000syscon  Vqos@ffaa0000syscon  dqos@ffaa0080syscon  eqos@ffaa8000syscon  fqos@ffaa8080syscon  gqos@ffab0000syscon  Wqos@ffab0080syscon  Xqos@ffab8000syscon  Yqos@ffac0000syscon  Zqos@ffac0080syscon  [qos@ffac8000syscon  hqos@ffac8080syscon  iqos@ffad0000syscon  jqos@ffad8080syscon qos@ffae0000syscon  \power-management@ff310000&rockchip,rk3399-pmusysconsimple-mfd1power-controller!rockchip,rk3399-power-controller;+ pd_iep@34"OVpd_rga@33!OWXpd_vcodec@31OYpd_vdu@32 OZ[pd_gpu@35#O\pd_edp@25lpd_emmc@23O]pd_gmac@22fO^pd_sd@27LO_pd_sdioaudio@28O`pd_usb3@24Oabpd_vio@15+pd_hdcp@21rOcpd_isp0@19Odepd_isp1@20Ofgpd_tcpc0@RK3399_PD_TCPC0~}pd_tcpc1@RK3399_PD_TCPC1 pd_vo@16+pd_vopb@17Ohipd_vopl@18Ojsyscon@ff320000)rockchip,rk3399-pmugrfsysconsimple-mfd2+ io-domains&rockchip,rk3399-pmu-io-voltage-domain7okayVkspi@ff350000(rockchip,rk3399-spirockchip,rk3066-spi5llspiclkapb_pclk<Qdefault_mnop+ 7disabledserial@ff370000&rockchip,rk3399-uartsnps,dw-apb-uart7ll"baudclkapb_pclkf@JQdefault_q 7disabledi2c@ff3c0000rockchip,rk3399-i2c<l G l l i2cpclk9Qdefault_r+7okay=pmic@1brockchip,rk808 s`Mxin32krk808-clkout2Qdefault_teuuuuuuvuuuvwregulatorsDCDC_REG1 (vdd_center7 qOpgq|regulator-state-memDCDC_REG2 (vdd_cpu_l7 qOpgq| regulator-state-memDCDC_REG3(vcc_ddr|regulator-state-memDCDC_REG4(vcc_1v87w@Ow@| kregulator-state-memw@LDO_REG1 (vcc_ldo17w@Ow@regulator-state-memLDO_REG2 (vcc1v8_hdmi7w@Ow@|regulator-state-memLDO_REG3 (vcc1v8_pmu7w@Ow@| wregulator-state-memw@LDO_REG4(vcc_sd7w@O-| regulator-state-mem-LDO_REG5 (vcc_ldo57-O-regulator-state-memLDO_REG6 (vcc_ldo67`O`regulator-state-memLDO_REG7 (vcc0v9_hdmi7 O |regulator-state-memLDO_REG8 (vcc_efuse7w@Ow@|regulator-state-memSWITCH_REG1 (vcc3v3_s3|regulator-state-memSWITCH_REG2 (vcc3v3_s0|regulator-state-memregulator@60 fcs,fan53555`(vdd_gpu7 'Oİg| ui2c@ff3d0000rockchip,rk3399-i2c=l G l l i2cpclk8Qdefault_x+7okay=codec@0a fsl,sgtl5000 yz#z0{7okay i2c@ff3e0000rockchip,rk3399-i2c>l G l l i2cpclk:Qdefault_|+7okay=regulator@60 fcs,fan53555` u (vdd_cpu_b7 'Oİg| pwm@ff420000(rockchip,rk3399-pwmrockchip,rk3288-pwmB<Qdefault_}lpwm7okaypwm@ff420010(rockchip,rk3399-pwmrockchip,rk3288-pwmB<Qdefault_~lpwm 7disabledpwm@ff420020(rockchip,rk3399-pwmrockchip,rk3288-pwmB <Qdefault_lpwm7okaypwm@ff420030(rockchip,rk3399-pwmrockchip,rk3288-pwmB0<Qdefault_lpwm 7disablediommu@ff650800rockchip,iommue@svpu_mmu aclkifaceG 7disablediommu@ff660480rockchip,iommu f@f@u vdec_mmu aclkifaceG 7disablediommu@ff670800rockchip,iommug@*iep_mmu aclkifaceG 7disabledrga@ff680000rockchip,rk3399-rgah7maclkhclksclk$jgi +coreaxiahb~!efuse@ff690000rockchip,rk3399-efusei+} pclk_efusecpu-id@7cpu-leakage@17gpu-leakage@18center-leakage@19cpu-leakage@1alogic-leakage@1bwafer-info@1cpmu-clock-controller@ff750000rockchip,rk3399-pmucruu`TlG(J lclock-controller@ff760000rockchip,rk3399-cruv`T@BCx@G#g/;рxh<4`#Fׄׄ  syscon@ff770000&rockchip,rk3399-grfsysconsimple-mfdw+ io-domains"rockchip,rk3399-io-voltage-domain7okayaknk{kusb2-phy@e450rockchip,rk3399-usb2phyP{phyclk`Mclk_usbphy0_480m7okay $host-port linestate7okay %otg-port0ghjotg-bvalidotg-idlinestate 7disabled (usb2-phy@e460rockchip,rk3399-usb2phy`|phyclk`Mclk_usbphy1_480m7okay &host-port linestate7okay 'otg-port0lmootg-bvalidotg-idlinestate7okay *phy@f780rockchip,rk3399-emmc-phy$emmcclk7okay #pcie-phyrockchip,rk3399-pcie-phyrefclk$+phy7okay phy@ff7c0000rockchip,rk3399-typec-phy|~}tcpdcoretcpdphy-ref~G~$L+uphyuphy-pipeuphy-tcphy    7okaydp-port ,usb3-port )phy@ff800000rockchip,rk3399-typec-phytcpdcoretcpdphy-refG~ $M+uphyuphy-pipeuphy-tcphy    7okaydp-port -usb3-port +watchdog@ff848000 snps,dw-wdt|xrktimer@ff850000rockchip,rk3399-timerQhZ pclktimerspdif@ff870000rockchip,rk3399-spdifB tx mclkhclkUQdefault_~ 7disabledi2s@ff880000(rockchip,rk3399-i2srockchip,rk3066-i2s' txrxi2s_clki2s_hclkVQdefault_~7okay  ' i2s@ff890000(rockchip,rk3399-i2srockchip,rk3066-i2s( txrxi2s_clki2s_hclkWQdefault_~ 7disabledi2s@ff8a0000(rockchip,rk3399-i2srockchip,rk3066-i2s) txrxi2s_clki2s_hclkX~ 7disabledvop@ff8f0000rockchip,rk3399-vop-lit>wGׄaclk_vopdclk_vophclk_vop A~$ +axiahbdclk7okayport+ endpoint@0 endpoint@1 endpoint@2 endpoint@3 endpoint@4 /iommu@ff8f3f00rockchip,iommu?w vopl_mmu aclkiface~G7okay vop@ff900000rockchip,rk3399-vop-big>vGׄaclk_vopdclk_vophclk_vop A~$ +axiahbdclk7okayport+ endpoint@0 endpoint@1 endpoint@2 endpoint@3 endpoint@4 .iommu@ff903f00rockchip,iommu?v vopb_mmu aclkiface~G7okay iommu@ff914000rockchip,iommu @P+ isp0_mmu aclkifaceG H 7disablediommu@ff924000rockchip,iommu @P, isp1_mmu aclkifaceG H 7disabledhdmi@ff940000rockchip,rk3399-dw-hdmi(tqopiahbisfrvpllgrfcec~J7okay cportsport+endpoint@0 endpoint@1 mipi@ff960000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi- porefpclkphy_cfggrf~$+apb 7disabledports+port@0+endpoint@0 endpoint@1 mipi@ff968000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi. qorefpclkphy_cfggrf~$+apb 7disabledports+port@0+endpoint@0 endpoint@1 edp@ff970000rockchip,rk3399-edp jlo dppclkgrfQdefault_~$+dp 7disabledports+port@0+endpoint@0 endpoint@1 gpu@ff9a0000#rockchip,rk3399-maliarm,mali-t8600 gpujobmmu~# 7disabledpinctrlrockchip,rk3399-pinctrl o+mQdefault_gpio0@ff720000rockchip,gpio-bankrl | i gpio1@ff730000rockchip,gpio-banksl | i sgpio2@ff780000rockchip,gpio-bankxP | i gpio3@ff788000rockchip,gpio-bankxQ | i gpio4@ff790000rockchip,gpio-bankyR | i pcfg-pull-up  pcfg-pull-down pcfg-pull-none  pcfg-pull-none-12ma   pcfg-pull-up-8ma  pcfg-pull-down-4ma  pcfg-pull-up-2ma  pcfg-pull-down-12ma  pcfg-pull-none-13ma   clockclk-32k edpedp-hpd  gmacrgmii-pins      rmii-pins      i2c0i2c0-xfer  ri2c1i2c1-xfer  0i2c2i2c2-xfer  1i2c3i2c3-xfer  2i2c4i2c4-xfer    xi2c5i2c5-xfer    3i2c6i2c6-xfer    4i2c7i2c7-xfer  5i2c8i2c8-xfer  |i2s0i2s0-2ch-bus@  i2s0-8ch-bus i2s1i2s1-2ch-busP  sdio0sdio0-bus1 sdio0-bus4@ sdio0-cmd sdio0-clk sdio0-cd sdio0-pwr sdio0-bkpwr sdio0-wp sdio0-int sdmmcsdmmc-bus1 sdmmc-bus4@     !sdmmc-clk   sdmmc-cmd   sdmmc-cd  sdmmc-wp sleepap-pwroff ddrio-pwroff spdifspdif-bus  spdif-bus-1 spi0spi0-clk  <spi0-cs0  ?spi0-cs1 spi0-tx  =spi0-rx  >spi1spi1-clk   @spi1-cs0   Cspi1-rx  Bspi1-tx  Aspi2spi2-clk   Dspi2-cs0   Gspi2-rx   Fspi2-tx   Espi3spi3-clk  mspi3-cs0  pspi3-rx  ospi3-tx  nspi4spi4-clk  Hspi4-cs0  Kspi4-rx  Jspi4-tx  Ispi5spi5-clk  Lspi5-cs0  Ospi5-rx  Nspi5-tx  Mtestclktest-clkout0 test-clkout1 test-clkout2 tsadcotp-gpio  Totp-out  Uuart0uart0-xfer  6uart0-cts  7uart0-rts  8uart1uart1-xfer    9uart2auart2a-xfer  uart2buart2b-xfer uart2cuart2c-xfer  :uart3uart3-xfer  ;uart3-cts uart3-rts uart4uart4-xfer  quarthdcpuarthdcp-xfer pwm0pwm0-pin  }vop0-pwm-pin pwm1pwm1-pin  ~vop1-pwm-pin pwm2pwm2-pin  pwm3apwm3a-pin  pwm3bpwm3b-pin hdmihdmi-i2c-xfer hdmi-cec pciepci-clkreqn-cpm  pci-clkreqnb-cpm ledsled-module-gpio  led-sd-gpio  pmicpmic-int-l  tusb2vcc5v0-host-en  otg-vbus-drv  hoghaikou-pin-hog@   opp-table0operating-points-v2  opp00 Q 5 @opp01 #F 5opp02 0, Popp03 < Hopp04 G B@opp05 Tfr *opp-table1operating-points-v2  opp00 Q 5 @opp01 #F 5opp02 0, 0 opp03 < mopp04 G ~opp05 Tfr popp06 _" opp07 kI Oopp08 v İ opp-table2operating-points-v2 opp00  5opp01 @ 5opp02 ׄ opp03 e Yopp04 #F Hopp05 / leds gpio-ledsQdefault_module-led &module_led A ,heartbeat Bsd-card-led &sd_card_led As ,mmc0external-gmac-clock fixed-clock=sY@ Mclkin_gmac` vcc1v2-phyregulator-fixed (vcc1v2_phy|7OOO u vcc3v3-sysregulator-fixed (vcc3v3_sys|72ZO2Z u vvcc5v0-host-regulatorregulator-fixed  RQdefault_ (vcc5v0_host| u vcc5v0-sysregulator-fixed (vcc5v0_sys|7LK@OLK@ uchosen dserial0:115200n8i2s0-soundsimple-audio-card pi2s Haikou,I2S-codec simple-audio-card,codecy simple-audio-card,cpu   sgtl5000-oscillator fixed-clock`=w ydc-12vregulator-fixed(dc_12v|7O vcc3v3-baseboardregulator-fixed(vcc3v3_baseboard|72ZO2Z  "vcc5v0-baseboardregulator-fixed(vcc5v0_baseboard|7LK@OLK@  vcc5v0-otg-regulatorregulator-fixed  Qdefault_ (vcc5v0_otg| vdda-codecregulator-fixed (vdda_codec72ZO2Z  zvddd-codecregulator-fixed (vddd_codec7jOj  { compatibleinterrupt-parent#address-cells#size-cellsmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4cpudevice_typeregenable-method#cooling-cellsclocksdynamic-power-coefficientoperating-points-v2cpu-supplyphandleportsinterruptsarm,no-tick-in-suspendclock-frequencyclock-output-names#clock-cellsranges#dma-cellsclock-namesreg-names#interrupt-cellsaspm-no-l0sbus-rangeinterrupt-namesinterrupt-map-maskinterrupt-maplinux,pci-domainmax-link-speedmsi-mapphysphy-namesresetsreset-namesstatusep-gpiosnum-lanespinctrl-namespinctrl-0interrupt-controllerpower-domainsrockchip,grfassigned-clocksassigned-clock-parentsclock_in_outphy-supplyphy-modesnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delaymax-frequencyfifo-depthassigned-clock-ratesvqmmcbus-widthcap-mmc-highspeedcap-sd-highspeedcd-gpiosdisable-wpvmmc-supplyarasan,soc-ctl-sysconmmc-hs400-1_8vmmc-hs400-enhanced-strobenon-removabledr_modephy_typesnps,dis_enblslpm_quirksnps,dis-u2-freeclk-exists-quirksnps,dis_u2_susphy_quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirk#sound-dai-cellsremote-endpointmsi-controlleraffinity#io-channel-cellsi2c-scl-rising-time-nsi2c-scl-falling-time-nscooling-min-statecooling-max-statereg-shiftreg-io-widthspi-max-frequencypolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#power-domain-cellspm_qospmu1830-supplyrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvddio-supplyregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-always-onregulator-boot-onregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvoltfcs,suspend-voltage-selectorvin-supplyVDDA-supplyVDDIO-supplyVDDD-supply#pwm-cells#iommu-cells#reset-cellsbt656-supplyaudio-supplysdmmc-supplygpio1830-supply#phy-cellsrockchip,typec-conn-dirrockchip,usb3tousb2-enrockchip,external-psmrockchip,pipe-statusdmasdma-namesrockchip,playback-channelsrockchip,capture-channelsiommusrockchip,disable-mmu-resetddc-i2c-busrockchip,pmugpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthrockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendturbo-modelabellinux,default-triggerpanic-indicatorenable-active-lowstdout-pathsimple-audio-card,formatsimple-audio-card,namesimple-audio-card,mclk-fssound-daibitclock-masterframe-masterenable-active-high