Originally committed as revision 18953 to svn://svn.ffmpeg.org/ffmpeg/trunk
Reimar Döffinger authored on 2009/05/26 14:00:51... | ... |
@@ -833,6 +833,7 @@ ARCH_LIST=' |
833 | 833 |
mips64 |
834 | 834 |
parisc |
835 | 835 |
ppc |
836 |
+ ppc64 |
|
836 | 837 |
s390 |
837 | 838 |
sh4 |
838 | 839 |
sparc |
... | ... |
@@ -906,7 +907,6 @@ HAVE_LIST=" |
906 | 906 |
mkstemp |
907 | 907 |
pld |
908 | 908 |
posix_memalign |
909 |
- ppc64 |
|
910 | 909 |
round |
911 | 910 |
roundf |
912 | 911 |
sdl |
... | ... |
@@ -1514,6 +1514,7 @@ case "$arch" in |
1514 | 1514 |
;; |
1515 | 1515 |
ppc64) |
1516 | 1516 |
arch="ppc" |
1517 |
+ subarch="ppc64" |
|
1517 | 1518 |
enable fast_64bit |
1518 | 1519 |
enable fast_unaligned |
1519 | 1520 |
;; |
... | ... |
@@ -1807,12 +1808,11 @@ if test $cpu != "generic"; then |
1807 | 1807 |
G5|g5|970|ppc970|PowerPC970|power4*|Power4*) |
1808 | 1808 |
add_cflags -mcpu=970 -mpowerpc-gfxopt -mpowerpc64 |
1809 | 1809 |
warn_altivec disabled PPC970 |
1810 |
- enable ppc64 |
|
1811 | 1810 |
;; |
1812 | 1811 |
Cell|CELL|cell) |
1813 | 1812 |
add_cflags -mcpu=cell |
1814 | 1813 |
warn_altivec disabled Cell |
1815 |
- enable ppc64 ldbrx |
|
1814 |
+ enable ldbrx |
|
1816 | 1815 |
;; |
1817 | 1816 |
# targets that do NOT support conditional mov (cmov) |
1818 | 1817 |
i[345]86|pentium|pentium-mmx|k6|k6-[23]|winchip-c6|winchip2|c3) |
... | ... |
@@ -27,7 +27,7 @@ |
27 | 27 |
void powerpc_display_perf_report(void); |
28 | 28 |
/* the 604* have 2, the G3* have 4, the G4s have 6, |
29 | 29 |
and the G5 are completely different (they MUST use |
30 |
- HAVE_PPC64, and let's hope all future 64 bis PPC |
|
30 |
+ ARCH_PPC64, and let's hope all future 64 bis PPC |
|
31 | 31 |
will use the same PMCs... */ |
32 | 32 |
#define POWERPC_NUM_PMC_ENABLED 6 |
33 | 33 |
/* if you add to the enum below, also add to the perfname array |
... | ... |
@@ -70,7 +70,7 @@ enum powerpc_data_index { |
70 | 70 |
}; |
71 | 71 |
extern unsigned long long perfdata[POWERPC_NUM_PMC_ENABLED][powerpc_perf_total][powerpc_data_total]; |
72 | 72 |
|
73 |
-#if !HAVE_PPC64 |
|
73 |
+#if !ARCH_PPC64 |
|
74 | 74 |
#define POWERP_PMC_DATATYPE unsigned long |
75 | 75 |
#define POWERPC_GET_PMC1(a) __asm__ volatile("mfspr %0, 937" : "=r" (a)) |
76 | 76 |
#define POWERPC_GET_PMC2(a) __asm__ volatile("mfspr %0, 938" : "=r" (a)) |
... | ... |
@@ -88,7 +88,7 @@ extern unsigned long long perfdata[POWERPC_NUM_PMC_ENABLED][powerpc_perf_total][ |
88 | 88 |
#define POWERPC_GET_PMC5(a) do {} while (0) |
89 | 89 |
#define POWERPC_GET_PMC6(a) do {} while (0) |
90 | 90 |
#endif |
91 |
-#else /* HAVE_PPC64 */ |
|
91 |
+#else /* ARCH_PPC64 */ |
|
92 | 92 |
#define POWERP_PMC_DATATYPE unsigned long long |
93 | 93 |
#define POWERPC_GET_PMC1(a) __asm__ volatile("mfspr %0, 771" : "=r" (a)) |
94 | 94 |
#define POWERPC_GET_PMC2(a) __asm__ volatile("mfspr %0, 772" : "=r" (a)) |
... | ... |
@@ -106,7 +106,7 @@ extern unsigned long long perfdata[POWERPC_NUM_PMC_ENABLED][powerpc_perf_total][ |
106 | 106 |
#define POWERPC_GET_PMC5(a) do {} while (0) |
107 | 107 |
#define POWERPC_GET_PMC6(a) do {} while (0) |
108 | 108 |
#endif |
109 |
-#endif /* HAVE_PPC64 */ |
|
109 |
+#endif /* ARCH_PPC64 */ |
|
110 | 110 |
#define POWERPC_PERF_DECLARE(a, cond) \ |
111 | 111 |
POWERP_PMC_DATATYPE \ |
112 | 112 |
pmc_start[POWERPC_NUM_PMC_ENABLED], \ |