Browse code
rv40: NEON optimised loop filter strength selection
Signed-off-by: Mans Rullgard <mans@mansr.com>
Mans Rullgard authored on 2011/12/08 13:26:12Showing 3 changed files
| ... | ... |
@@ -113,6 +113,12 @@ T add \rn, \rn, \rm |
| 113 | 113 |
T ldr \rt, [\rn] |
| 114 | 114 |
.endm |
| 115 | 115 |
|
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+.macro ldr_dpre rt, rn, rm:vararg |
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+A ldr \rt, [\rn, -\rm]! |
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+T sub \rn, \rn, \rm |
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+T ldr \rt, [\rn] |
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+.endm |
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+ |
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| 116 | 122 |
.macro ldr_post rt, rn, rm:vararg |
| 117 | 123 |
A ldr \rt, [\rn], \rm |
| 118 | 124 |
T ldr \rt, [\rn] |
| ... | ... |
@@ -54,6 +54,13 @@ void ff_avg_rv40_chroma_mc4_neon(uint8_t *, uint8_t *, int, int, int, int); |
| 54 | 54 |
void ff_rv40_weight_func_16_neon(uint8_t *, uint8_t *, uint8_t *, int, int, int); |
| 55 | 55 |
void ff_rv40_weight_func_8_neon(uint8_t *, uint8_t *, uint8_t *, int, int, int); |
| 56 | 56 |
|
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+int ff_rv40_h_loop_filter_strength_neon(uint8_t *src, int stride, |
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+ int beta, int beta2, int edge, |
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+ int *p1, int *q1); |
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+int ff_rv40_v_loop_filter_strength_neon(uint8_t *src, int stride, |
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+ int beta, int beta2, int edge, |
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+ int *p1, int *q1); |
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+ |
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| 57 | 64 |
void ff_rv40dsp_init_neon(RV34DSPContext *c, DSPContext* dsp) |
| 58 | 65 |
{
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| 59 | 66 |
c->put_pixels_tab[0][ 1] = ff_put_rv40_qpel16_mc10_neon; |
| ... | ... |
@@ -116,4 +123,7 @@ void ff_rv40dsp_init_neon(RV34DSPContext *c, DSPContext* dsp) |
| 116 | 116 |
|
| 117 | 117 |
c->rv40_weight_pixels_tab[0] = ff_rv40_weight_func_16_neon; |
| 118 | 118 |
c->rv40_weight_pixels_tab[1] = ff_rv40_weight_func_8_neon; |
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+ |
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+ c->rv40_loop_filter_strength[0] = ff_rv40_h_loop_filter_strength_neon; |
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+ c->rv40_loop_filter_strength[1] = ff_rv40_v_loop_filter_strength_neon; |
|
| 119 | 122 |
} |
| ... | ... |
@@ -722,3 +722,89 @@ function ff_rv40_weight_func_8_neon, export=1 |
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bne 1b |
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bx lr |
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endfunc |
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+ |
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+function ff_rv40_h_loop_filter_strength_neon, export=1 |
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+ pkhbt r2, r3, r2, lsl #18 |
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+ |
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+ ldr r3, [r0] |
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+ ldr_dpre r12, r0, r1 |
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+ teq r3, r12 |
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+ beq 1f |
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+ |
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+ sub r0, r0, r1, lsl #1 |
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+ |
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+ vld1.32 {d4[]}, [r0,:32], r1 @ -3
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+ vld1.32 {d0[]}, [r0,:32], r1 @ -2
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+ vld1.32 {d4[1]}, [r0,:32], r1 @ -1
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+ vld1.32 {d5[]}, [r0,:32], r1 @ 0
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+ vld1.32 {d1[]}, [r0,:32], r1 @ 1
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+ vld1.32 {d5[0]}, [r0,:32], r1 @ 2
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+ |
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+ vpaddl.u8 q8, q0 @ -2, -2, -2, -2, 1, 1, 1, 1 |
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+ vpaddl.u8 q9, q2 @ -3, -3, -1, -1, 2, 2, 0, 0 |
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+ vdup.32 d30, r2 @ beta2, beta << 2 |
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+ vpadd.u16 d16, d16, d17 @ -2, -2, 1, 1 |
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+ vpadd.u16 d18, d18, d19 @ -3, -1, 2, 0 |
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+ vabd.u16 d16, d18, d16 |
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+ vclt.u16 d16, d16, d30 |
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+ |
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+ ldrd r2, r3, [sp, #4] |
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+ vmovl.u16 q12, d16 |
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+ vtrn.16 d16, d17 |
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+ vshr.u32 q12, q12, #15 |
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+ ldr r0, [sp] |
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+ vst1.32 {d24[1]}, [r2,:32]
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+ vst1.32 {d25[1]}, [r3,:32]
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+ |
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+ cmp r0, #0 |
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+ it eq |
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+ bxeq lr |
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+ |
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+ vand d18, d16, d17 |
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+ vtrn.32 d18, d19 |
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+ vand d18, d18, d19 |
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+ vmov.u16 r0, d18[0] |
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+ bx lr |
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+1: |
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+ ldrd r2, r3, [sp, #4] |
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+ mov r0, #0 |
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+ str r0, [r2] |
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+ str r0, [r3] |
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+ bx lr |
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+endfunc |
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+ |
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+function ff_rv40_v_loop_filter_strength_neon, export=1 |
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+ sub r0, r0, #3 |
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+ pkhbt r2, r3, r2, lsl #18 |
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+ |
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+ vld1.8 {d0}, [r0], r1
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+ vld1.8 {d1}, [r0], r1
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+ vld1.8 {d2}, [r0], r1
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+ vld1.8 {d3}, [r0], r1
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+ |
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+ vaddl.u8 q0, d0, d1 |
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+ vaddl.u8 q1, d2, d3 |
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+ vdup.32 q15, r2 |
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+ vadd.u16 q0, q0, q1 @ -3, -2, -1, 0, 1, 2 |
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+ vext.16 q1, q0, q0, #1 @ -2, -1, 0, 1, 2 |
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+ vabd.u16 q0, q1, q0 |
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+ vclt.u16 q0, q0, q15 |
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+ |
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+ ldrd r2, r3, [sp, #4] |
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+ vmovl.u16 q1, d0 |
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+ vext.16 d1, d0, d1, #3 |
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+ vshr.u32 q1, q1, #15 |
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+ ldr r0, [sp] |
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+ vst1.32 {d2[1]}, [r2,:32]
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+ vst1.32 {d3[1]}, [r3,:32]
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+ |
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+ cmp r0, #0 |
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+ it eq |
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+ bxeq lr |
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+ |
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+ vand d0, d0, d1 |
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+ vtrn.16 d0, d1 |
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+ vand d0, d0, d1 |
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+ vmov.u16 r0, d0[0] |
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+ bx lr |
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+endfunc |