Originally committed as revision 9355 to svn://svn.ffmpeg.org/ffmpeg/trunk
Måns Rullgård authored on 2007/06/18 00:47:03... | ... |
@@ -671,6 +671,7 @@ HAVE_LIST=" |
671 | 671 |
memalign |
672 | 672 |
mlib |
673 | 673 |
os2 |
674 |
+ ppc64 |
|
674 | 675 |
sdl |
675 | 676 |
sdl_video_size |
676 | 677 |
soundcard_h |
... | ... |
@@ -1289,7 +1290,6 @@ enabled needmdynamicnopic && add_cflags -mdynamic-no-pic |
1289 | 1289 |
disabled optimize || add_cflags -fomit-frame-pointer |
1290 | 1290 |
|
1291 | 1291 |
# Add processor-specific flags |
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-POWERPCMODE="32bits" |
|
1293 | 1292 |
if test $cpu != "generic"; then |
1294 | 1293 |
warn_altivec(){ |
1295 | 1294 |
$1 altivec && echo "WARNING: Tuning for $2 but AltiVec $1."; |
... | ... |
@@ -1322,12 +1322,12 @@ if test $cpu != "generic"; then |
1322 | 1322 |
G5|g5|970|ppc970|PowerPC970|power4*|Power4*) |
1323 | 1323 |
add_cflags "-mcpu=970 -mpowerpc-gfxopt -mpowerpc64" |
1324 | 1324 |
warn_altivec disabled PPC970 |
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- POWERPCMODE="64bits" |
|
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+ enable ppc64 |
|
1326 | 1326 |
;; |
1327 | 1327 |
Cell|CELL|cell) |
1328 | 1328 |
add_cflags "-mcpu=cell" |
1329 | 1329 |
warn_altivec disabled Cell |
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- POWERPCMODE="64bits" |
|
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+ enable ppc64 |
|
1331 | 1331 |
;; |
1332 | 1332 |
# targets that do NOT support conditional mov (cmov) |
1333 | 1333 |
i[345]86|pentium|pentium-mmx|k6|k6-[23]|winchip-c6|winchip2|c3) |
... | ... |
@@ -1894,14 +1894,6 @@ echo "SLIBPREF=$SLIBPREF" >> config.mak |
1894 | 1894 |
echo "SLIBSUF=\${BUILDSUF}$SLIBSUF" >> config.mak |
1895 | 1895 |
echo "EXESUF=\${BUILDSUF}$EXESUF" >> config.mak |
1896 | 1896 |
|
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-case "$arch" in |
|
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- powerpc) |
|
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- if test "$POWERPCMODE" = "64bits"; then |
|
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- echo "#define POWERPC_MODE_64BITS 1" >> $TMPH |
|
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- fi |
|
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- ;; |
|
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-esac |
|
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- |
|
1905 | 1897 |
if enabled bigendian; then |
1906 | 1898 |
echo "WORDS_BIGENDIAN=yes" >> config.mak |
1907 | 1899 |
echo "#define WORDS_BIGENDIAN 1" >> $TMPH |
... | ... |
@@ -25,7 +25,7 @@ |
25 | 25 |
void powerpc_display_perf_report(void); |
26 | 26 |
/* the 604* have 2, the G3* have 4, the G4s have 6, |
27 | 27 |
and the G5 are completely different (they MUST use |
28 |
- POWERPC_MODE_64BITS, and let's hope all future 64 bis PPC |
|
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+ HAVE_PPC64, and let's hope all future 64 bis PPC |
|
29 | 29 |
will use the same PMCs... */ |
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#define POWERPC_NUM_PMC_ENABLED 6 |
31 | 31 |
/* if you add to the enum below, also add to the perfname array |
... | ... |
@@ -68,7 +68,7 @@ enum powerpc_data_index { |
68 | 68 |
}; |
69 | 69 |
extern unsigned long long perfdata[POWERPC_NUM_PMC_ENABLED][powerpc_perf_total][powerpc_data_total]; |
70 | 70 |
|
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-#ifndef POWERPC_MODE_64BITS |
|
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+#ifndef HAVE_PPC64 |
|
72 | 72 |
#define POWERP_PMC_DATATYPE unsigned long |
73 | 73 |
#define POWERPC_GET_PMC1(a) asm volatile("mfspr %0, 937" : "=r" (a)) |
74 | 74 |
#define POWERPC_GET_PMC2(a) asm volatile("mfspr %0, 938" : "=r" (a)) |
... | ... |
@@ -86,7 +86,7 @@ extern unsigned long long perfdata[POWERPC_NUM_PMC_ENABLED][powerpc_perf_total][ |
86 | 86 |
#define POWERPC_GET_PMC5(a) do {} while (0) |
87 | 87 |
#define POWERPC_GET_PMC6(a) do {} while (0) |
88 | 88 |
#endif |
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-#else /* POWERPC_MODE_64BITS */ |
|
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+#else /* HAVE_PPC64 */ |
|
90 | 90 |
#define POWERP_PMC_DATATYPE unsigned long long |
91 | 91 |
#define POWERPC_GET_PMC1(a) asm volatile("mfspr %0, 771" : "=r" (a)) |
92 | 92 |
#define POWERPC_GET_PMC2(a) asm volatile("mfspr %0, 772" : "=r" (a)) |
... | ... |
@@ -104,7 +104,7 @@ extern unsigned long long perfdata[POWERPC_NUM_PMC_ENABLED][powerpc_perf_total][ |
104 | 104 |
#define POWERPC_GET_PMC5(a) do {} while (0) |
105 | 105 |
#define POWERPC_GET_PMC6(a) do {} while (0) |
106 | 106 |
#endif |
107 |
-#endif /* POWERPC_MODE_64BITS */ |
|
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+#endif /* HAVE_PPC64 */ |
|
108 | 108 |
#define POWERPC_PERF_DECLARE(a, cond) \ |
109 | 109 |
POWERP_PMC_DATATYPE \ |
110 | 110 |
pmc_start[POWERPC_NUM_PMC_ENABLED], \ |