Originally committed as revision 709 to svn://svn.ffmpeg.org/ffmpeg/trunk
| ... | ... |
@@ -63,10 +63,11 @@ endif |
| 63 | 63 |
# alpha specific stuff |
| 64 | 64 |
ifeq ($(TARGET_ARCH_ALPHA),yes) |
| 65 | 65 |
OBJS += alpha/dsputil_alpha.o alpha/mpegvideo_alpha.o |
| 66 |
+ASM_OBJS += alpha/dsputil_alpha_asm.o |
|
| 66 | 67 |
CFLAGS += -Wa,-mpca56 |
| 67 | 68 |
endif |
| 68 | 69 |
|
| 69 |
-SRCS := $(OBJS:.o=.c) $(ASM_OBJS:.o=.s) |
|
| 70 |
+SRCS := $(OBJS:.o=.c) $(ASM_OBJS:.o=.S) |
|
| 70 | 71 |
OBJS := $(OBJS) $(ASM_OBJS) |
| 71 | 72 |
|
| 72 | 73 |
LIB= libavcodec.a |
| ... | ... |
@@ -22,64 +22,86 @@ |
| 22 | 22 |
|
| 23 | 23 |
void simple_idct_axp(DCTELEM *block); |
| 24 | 24 |
|
| 25 |
-static void put_pixels_clamped_axp(const DCTELEM *block, UINT8 *pixels, |
|
| 26 |
- int line_size) |
|
| 25 |
+void put_pixels_clamped_mvi_asm(const DCTELEM *block, uint8_t *pixels, |
|
| 26 |
+ int line_size); |
|
| 27 |
+void add_pixels_clamped_mvi_asm(const DCTELEM *block, uint8_t *pixels, |
|
| 28 |
+ int line_size); |
|
| 29 |
+ |
|
| 30 |
+#if 0 |
|
| 31 |
+/* These functions were the base for the optimized assembler routines, |
|
| 32 |
+ and remain here for documentation purposes. */ |
|
| 33 |
+static void put_pixels_clamped_mvi(const DCTELEM *block, uint8_t *pixels, |
|
| 34 |
+ int line_size) |
|
| 27 | 35 |
{
|
| 28 | 36 |
int i = 8; |
| 37 |
+ uint64_t clampmask = zap(-1, 0xaa); /* 0x00ff00ff00ff00ff */ |
|
| 29 | 38 |
|
| 30 | 39 |
ASM_ACCEPT_MVI; |
| 31 | 40 |
|
| 32 | 41 |
do {
|
| 33 |
- UINT64 shorts; |
|
| 42 |
+ uint64_t shorts0, shorts1; |
|
| 34 | 43 |
|
| 35 |
- shorts = ldq(block); |
|
| 36 |
- shorts = maxsw4(shorts, 0); |
|
| 37 |
- shorts = minsw4(shorts, WORD_VEC(0x00ff)); |
|
| 38 |
- stl(pkwb(shorts), pixels); |
|
| 44 |
+ shorts0 = ldq(block); |
|
| 45 |
+ shorts0 = maxsw4(shorts0, 0); |
|
| 46 |
+ shorts0 = minsw4(shorts0, clampmask); |
|
| 47 |
+ stl(pkwb(shorts0), pixels); |
|
| 39 | 48 |
|
| 40 |
- shorts = ldq(block + 4); |
|
| 41 |
- shorts = maxsw4(shorts, 0); |
|
| 42 |
- shorts = minsw4(shorts, WORD_VEC(0x00ff)); |
|
| 43 |
- stl(pkwb(shorts), pixels + 4); |
|
| 49 |
+ shorts1 = ldq(block + 4); |
|
| 50 |
+ shorts1 = maxsw4(shorts1, 0); |
|
| 51 |
+ shorts1 = minsw4(shorts1, clampmask); |
|
| 52 |
+ stl(pkwb(shorts1), pixels + 4); |
|
| 44 | 53 |
|
| 45 |
- pixels += line_size; |
|
| 46 |
- block += 8; |
|
| 54 |
+ pixels += line_size; |
|
| 55 |
+ block += 8; |
|
| 47 | 56 |
} while (--i); |
| 48 | 57 |
} |
| 49 | 58 |
|
| 50 |
-static void add_pixels_clamped_axp(const DCTELEM *block, UINT8 *pixels, |
|
| 51 |
- int line_size) |
|
| 59 |
+void add_pixels_clamped_mvi(const DCTELEM *block, uint8_t *pixels, |
|
| 60 |
+ int line_size) |
|
| 52 | 61 |
{
|
| 53 |
- int i = 8; |
|
| 62 |
+ int h = 8; |
|
| 63 |
+ /* Keep this function a leaf function by generating the constants |
|
| 64 |
+ manually (mainly for the hack value ;-). */ |
|
| 65 |
+ uint64_t clampmask = zap(-1, 0xaa); /* 0x00ff00ff00ff00ff */ |
|
| 66 |
+ uint64_t signmask = zap(-1, 0x33); |
|
| 67 |
+ signmask ^= signmask >> 1; /* 0x8000800080008000 */ |
|
| 54 | 68 |
|
| 55 | 69 |
ASM_ACCEPT_MVI; |
| 56 | 70 |
|
| 57 | 71 |
do {
|
| 58 |
- UINT64 shorts; |
|
| 59 |
- |
|
| 60 |
- shorts = ldq(block); |
|
| 61 |
- shorts &= ~WORD_VEC(0x8000); /* clear highest bit to avoid overflow */ |
|
| 62 |
- shorts += unpkbw(ldl(pixels)); |
|
| 63 |
- shorts &= ~WORD_VEC(0x8000); /* hibit would be set for e. g. -2 + 3 */ |
|
| 64 |
- shorts = minuw4(shorts, WORD_VEC(0x4000)); /* set neg. to 0x4000 */ |
|
| 65 |
- shorts &= ~WORD_VEC(0x4000); /* ...and zap them */ |
|
| 66 |
- shorts = minsw4(shorts, WORD_VEC(0x00ff)); /* clamp to 255 */ |
|
| 67 |
- stl(pkwb(shorts), pixels); |
|
| 68 |
- |
|
| 69 |
- /* next 4 */ |
|
| 70 |
- shorts = ldq(block + 4); |
|
| 71 |
- shorts &= ~WORD_VEC(0x8000); |
|
| 72 |
- shorts += unpkbw(ldl(pixels + 4)); |
|
| 73 |
- shorts &= ~WORD_VEC(0x8000); |
|
| 74 |
- shorts = minuw4(shorts, WORD_VEC(0x4000)); |
|
| 75 |
- shorts &= ~WORD_VEC(0x4000); |
|
| 76 |
- shorts = minsw4(shorts, WORD_VEC(0x00ff)); |
|
| 77 |
- stl(pkwb(shorts), pixels + 4); |
|
| 78 |
- |
|
| 79 |
- pixels += line_size; |
|
| 80 |
- block += 8; |
|
| 81 |
- } while (--i); |
|
| 72 |
+ uint64_t shorts0, pix0, signs0; |
|
| 73 |
+ uint64_t shorts1, pix1, signs1; |
|
| 74 |
+ |
|
| 75 |
+ shorts0 = ldq(block); |
|
| 76 |
+ shorts1 = ldq(block + 4); |
|
| 77 |
+ |
|
| 78 |
+ pix0 = unpkbw(ldl(pixels)); |
|
| 79 |
+ /* Signed subword add (MMX paddw). */ |
|
| 80 |
+ signs0 = shorts0 & signmask; |
|
| 81 |
+ shorts0 &= ~signmask; |
|
| 82 |
+ shorts0 += pix0; |
|
| 83 |
+ shorts0 ^= signs0; |
|
| 84 |
+ /* Clamp. */ |
|
| 85 |
+ shorts0 = maxsw4(shorts0, 0); |
|
| 86 |
+ shorts0 = minsw4(shorts0, clampmask); |
|
| 87 |
+ |
|
| 88 |
+ /* Next 4. */ |
|
| 89 |
+ pix1 = unpkbw(ldl(pixels + 4)); |
|
| 90 |
+ signs1 = shorts1 & signmask; |
|
| 91 |
+ shorts1 &= ~signmask; |
|
| 92 |
+ shorts1 += pix1; |
|
| 93 |
+ shorts1 ^= signs1; |
|
| 94 |
+ shorts1 = maxsw4(shorts1, 0); |
|
| 95 |
+ shorts1 = minsw4(shorts1, clampmask); |
|
| 96 |
+ |
|
| 97 |
+ stl(pkwb(shorts0), pixels); |
|
| 98 |
+ stl(pkwb(shorts1), pixels + 4); |
|
| 99 |
+ |
|
| 100 |
+ pixels += line_size; |
|
| 101 |
+ block += 8; |
|
| 102 |
+ } while (--h); |
|
| 82 | 103 |
} |
| 104 |
+#endif |
|
| 83 | 105 |
|
| 84 | 106 |
/* Average 8 unsigned bytes in parallel: (b1 + b2) >> 1 |
| 85 | 107 |
Since the immediate result could be greater than 255, we do the |
| ... | ... |
@@ -222,7 +244,7 @@ void dsputil_init_alpha(void) |
| 222 | 222 |
|
| 223 | 223 |
/* amask clears all bits that correspond to present features. */ |
| 224 | 224 |
if (amask(AMASK_MVI) == 0) {
|
| 225 |
- put_pixels_clamped = put_pixels_clamped_axp; |
|
| 226 |
- add_pixels_clamped = add_pixels_clamped_axp; |
|
| 225 |
+ put_pixels_clamped = put_pixels_clamped_mvi_asm; |
|
| 226 |
+ add_pixels_clamped = add_pixels_clamped_mvi_asm; |
|
| 227 | 227 |
} |
| 228 | 228 |
} |
| 229 | 229 |
new file mode 100644 |
| ... | ... |
@@ -0,0 +1,176 @@ |
| 0 |
+/* |
|
| 1 |
+ * Alpha optimized DSP utils |
|
| 2 |
+ * Copyright (c) 2002 Falk Hueffner <falk@debian.org> |
|
| 3 |
+ * |
|
| 4 |
+ * This program is free software; you can redistribute it and/or modify |
|
| 5 |
+ * it under the terms of the GNU General Public License as published by |
|
| 6 |
+ * the Free Software Foundation; either version 2 of the License, or |
|
| 7 |
+ * (at your option) any later version. |
|
| 8 |
+ * |
|
| 9 |
+ * This program is distributed in the hope that it will be useful, |
|
| 10 |
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of |
|
| 11 |
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|
| 12 |
+ * GNU General Public License for more details. |
|
| 13 |
+ * |
|
| 14 |
+ * You should have received a copy of the GNU General Public License |
|
| 15 |
+ * along with this program; if not, write to the Free Software |
|
| 16 |
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
|
| 17 |
+ */ |
|
| 18 |
+ |
|
| 19 |
+/* |
|
| 20 |
+ * These functions are scheduled for pca56. They should work |
|
| 21 |
+ * reasonably on ev6, though. |
|
| 22 |
+ */ |
|
| 23 |
+ |
|
| 24 |
+#include "regdef.h" |
|
| 25 |
+ |
|
| 26 |
+/* Some nicer register names. */ |
|
| 27 |
+#define ta t10 |
|
| 28 |
+#define tb t11 |
|
| 29 |
+#define tc t12 |
|
| 30 |
+#define td AT |
|
| 31 |
+/* Danger: these overlap with the argument list and the return value */ |
|
| 32 |
+#define te a5 |
|
| 33 |
+#define tf a4 |
|
| 34 |
+#define tg a3 |
|
| 35 |
+#define th v0 |
|
| 36 |
+ |
|
| 37 |
+ .set noat |
|
| 38 |
+ .set noreorder |
|
| 39 |
+ .arch pca56 |
|
| 40 |
+ .text |
|
| 41 |
+ |
|
| 42 |
+/************************************************************************ |
|
| 43 |
+ * void put_pixels_clamped_mvi_asm(const DCTELEM *block, uint8_t *pixels, |
|
| 44 |
+ * int line_size) |
|
| 45 |
+ */ |
|
| 46 |
+ .align 6 |
|
| 47 |
+ .globl put_pixels_clamped_mvi_asm |
|
| 48 |
+ .ent put_pixels_clamped_mvi_asm |
|
| 49 |
+put_pixels_clamped_mvi_asm: |
|
| 50 |
+ .frame sp, 0, ra |
|
| 51 |
+ .prologue 0 |
|
| 52 |
+ |
|
| 53 |
+ lda t8, -1 |
|
| 54 |
+ lda t9, 8 # loop counter |
|
| 55 |
+ zap t8, 0xaa, t8 # 00ff00ff00ff00ff |
|
| 56 |
+ |
|
| 57 |
+ .align 4 |
|
| 58 |
+1: ldq t0, 0(a0) |
|
| 59 |
+ ldq t1, 8(a0) |
|
| 60 |
+ ldq t2, 16(a0) |
|
| 61 |
+ ldq t3, 24(a0) |
|
| 62 |
+ |
|
| 63 |
+ maxsw4 t0, zero, t0 |
|
| 64 |
+ subq t9, 2, t9 |
|
| 65 |
+ maxsw4 t1, zero, t1 |
|
| 66 |
+ lda a0, 32(a0) |
|
| 67 |
+ |
|
| 68 |
+ maxsw4 t2, zero, t2 |
|
| 69 |
+ addq a1, a2, ta |
|
| 70 |
+ maxsw4 t3, zero, t3 |
|
| 71 |
+ minsw4 t0, t8, t0 |
|
| 72 |
+ |
|
| 73 |
+ minsw4 t1, t8, t1 |
|
| 74 |
+ minsw4 t2, t8, t2 |
|
| 75 |
+ minsw4 t3, t8, t3 |
|
| 76 |
+ pkwb t0, t0 |
|
| 77 |
+ |
|
| 78 |
+ pkwb t1, t1 |
|
| 79 |
+ pkwb t2, t2 |
|
| 80 |
+ pkwb t3, t3 |
|
| 81 |
+ stl t0, 0(a1) |
|
| 82 |
+ |
|
| 83 |
+ stl t1, 4(a1) |
|
| 84 |
+ addq ta, a2, a1 |
|
| 85 |
+ stl t2, 0(ta) |
|
| 86 |
+ stl t3, 4(ta) |
|
| 87 |
+ |
|
| 88 |
+ bne t9, 1b |
|
| 89 |
+ ret |
|
| 90 |
+ .end put_pixels_clamped_mvi_asm |
|
| 91 |
+ |
|
| 92 |
+/************************************************************************ |
|
| 93 |
+ * void add_pixels_clamped_mvi_asm(const DCTELEM *block, uint8_t *pixels, |
|
| 94 |
+ * int line_size) |
|
| 95 |
+ */ |
|
| 96 |
+ .align 6 |
|
| 97 |
+ .globl add_pixels_clamped_mvi_asm |
|
| 98 |
+ .ent add_pixels_clamped_mvi_asm |
|
| 99 |
+add_pixels_clamped_mvi_asm: |
|
| 100 |
+ .frame sp, 0, ra |
|
| 101 |
+ .prologue 0 |
|
| 102 |
+ |
|
| 103 |
+ lda t1, -1 |
|
| 104 |
+ lda th, 8 |
|
| 105 |
+ zap t1, 0x33, tg |
|
| 106 |
+ nop |
|
| 107 |
+ |
|
| 108 |
+ srl tg, 1, t0 |
|
| 109 |
+ xor tg, t0, tg # 0x8000800080008000 |
|
| 110 |
+ zap t1, 0xaa, tf # 0x00ff00ff00ff00ff |
|
| 111 |
+ |
|
| 112 |
+ .align 4 |
|
| 113 |
+1: ldl t1, 0(a1) # pix0 (try to hit cache line soon) |
|
| 114 |
+ ldl t4, 4(a1) # pix1 |
|
| 115 |
+ addq a1, a2, te # pixels += line_size |
|
| 116 |
+ ldq t0, 0(a0) # shorts0 |
|
| 117 |
+ |
|
| 118 |
+ ldl t7, 0(te) # pix2 (try to hit cache line soon) |
|
| 119 |
+ ldl ta, 4(te) # pix3 |
|
| 120 |
+ ldq t3, 8(a0) # shorts1 |
|
| 121 |
+ ldq t6, 16(a0) # shorts2 |
|
| 122 |
+ |
|
| 123 |
+ ldq t9, 24(a0) # shorts3 |
|
| 124 |
+ unpkbw t1, t1 # 0 0 (quarter/op no.) |
|
| 125 |
+ and t0, tg, t2 # 0 1 |
|
| 126 |
+ unpkbw t4, t4 # 1 0 |
|
| 127 |
+ |
|
| 128 |
+ bic t0, tg, t0 # 0 2 |
|
| 129 |
+ unpkbw t7, t7 # 2 0 |
|
| 130 |
+ and t3, tg, t5 # 1 1 |
|
| 131 |
+ addq t0, t1, t0 # 0 3 |
|
| 132 |
+ |
|
| 133 |
+ xor t0, t2, t0 # 0 4 |
|
| 134 |
+ unpkbw ta, ta # 3 0 |
|
| 135 |
+ and t6, tg, t8 # 2 1 |
|
| 136 |
+ maxsw4 t0, zero, t0 # 0 5 |
|
| 137 |
+ |
|
| 138 |
+ bic t3, tg, t3 # 1 2 |
|
| 139 |
+ bic t6, tg, t6 # 2 2 |
|
| 140 |
+ minsw4 t0, tf, t0 # 0 6 |
|
| 141 |
+ addq t3, t4, t3 # 1 3 |
|
| 142 |
+ |
|
| 143 |
+ pkwb t0, t0 # 0 7 |
|
| 144 |
+ xor t3, t5, t3 # 1 4 |
|
| 145 |
+ maxsw4 t3, zero, t3 # 1 5 |
|
| 146 |
+ addq t6, t7, t6 # 2 3 |
|
| 147 |
+ |
|
| 148 |
+ xor t6, t8, t6 # 2 4 |
|
| 149 |
+ and t9, tg, tb # 3 1 |
|
| 150 |
+ minsw4 t3, tf, t3 # 1 6 |
|
| 151 |
+ bic t9, tg, t9 # 3 2 |
|
| 152 |
+ |
|
| 153 |
+ maxsw4 t6, zero, t6 # 2 5 |
|
| 154 |
+ addq t9, ta, t9 # 3 3 |
|
| 155 |
+ stl t0, 0(a1) # 0 8 |
|
| 156 |
+ minsw4 t6, tf, t6 # 2 6 |
|
| 157 |
+ |
|
| 158 |
+ xor t9, tb, t9 # 3 4 |
|
| 159 |
+ maxsw4 t9, zero, t9 # 3 5 |
|
| 160 |
+ lda a0, 32(a0) # block += 16; |
|
| 161 |
+ pkwb t3, t3 # 1 7 |
|
| 162 |
+ |
|
| 163 |
+ minsw4 t9, tf, t9 # 3 6 |
|
| 164 |
+ subq th, 2, th |
|
| 165 |
+ pkwb t6, t6 # 2 7 |
|
| 166 |
+ pkwb t9, t9 # 3 7 |
|
| 167 |
+ |
|
| 168 |
+ stl t3, 4(a1) # 1 8 |
|
| 169 |
+ addq te, a2, a1 # pixels += line_size |
|
| 170 |
+ stl t6, 0(te) # 2 8 |
|
| 171 |
+ stl t9, 4(te) # 3 8 |
|
| 172 |
+ |
|
| 173 |
+ bne th, 1b |
|
| 174 |
+ ret |
|
| 175 |
+ .end add_pixels_clamped_mvi_asm |
| 0 | 176 |
new file mode 100644 |
| ... | ... |
@@ -0,0 +1,45 @@ |
| 0 |
+/* Some BSDs don't seem to have regdef.h... sigh */ |
|
| 1 |
+#ifndef alpha_regdef_h |
|
| 2 |
+#define alpha_regdef_h |
|
| 3 |
+ |
|
| 4 |
+#define v0 $0 /* function return value */ |
|
| 5 |
+ |
|
| 6 |
+#define t0 $1 /* temporary registers (caller-saved) */ |
|
| 7 |
+#define t1 $2 |
|
| 8 |
+#define t2 $3 |
|
| 9 |
+#define t3 $4 |
|
| 10 |
+#define t4 $5 |
|
| 11 |
+#define t5 $6 |
|
| 12 |
+#define t6 $7 |
|
| 13 |
+#define t7 $8 |
|
| 14 |
+ |
|
| 15 |
+#define s0 $9 /* saved-registers (callee-saved registers) */ |
|
| 16 |
+#define s1 $10 |
|
| 17 |
+#define s2 $11 |
|
| 18 |
+#define s3 $12 |
|
| 19 |
+#define s4 $13 |
|
| 20 |
+#define s5 $14 |
|
| 21 |
+#define s6 $15 |
|
| 22 |
+#define fp s6 /* frame-pointer (s6 in frame-less procedures) */ |
|
| 23 |
+ |
|
| 24 |
+#define a0 $16 /* argument registers (caller-saved) */ |
|
| 25 |
+#define a1 $17 |
|
| 26 |
+#define a2 $18 |
|
| 27 |
+#define a3 $19 |
|
| 28 |
+#define a4 $20 |
|
| 29 |
+#define a5 $21 |
|
| 30 |
+ |
|
| 31 |
+#define t8 $22 /* more temps (caller-saved) */ |
|
| 32 |
+#define t9 $23 |
|
| 33 |
+#define t10 $24 |
|
| 34 |
+#define t11 $25 |
|
| 35 |
+#define ra $26 /* return address register */ |
|
| 36 |
+#define t12 $27 |
|
| 37 |
+ |
|
| 38 |
+#define pv t12 /* procedure-variable register */ |
|
| 39 |
+#define AT $at /* assembler temporary */ |
|
| 40 |
+#define gp $29 /* global pointer */ |
|
| 41 |
+#define sp $30 /* stack pointer */ |
|
| 42 |
+#define zero $31 /* reads as zero, writes are noops */ |
|
| 43 |
+ |
|
| 44 |
+#endif /* alpha_regdef_h */ |