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mips: remove --mips32r5 configure option
Having a configure option with the same name as a MIPS ISA is confusing,
so better to remove it. This option was being used to add some
optimizations to a specific core (p5600). We will add the optimizations
just when the p5600 core has been detected, in a later patch.
Signed-off-by: Vicente Olivert Riera <Vincent.Riera@imgtec.com>
Signed-off-by: Michael Niedermayer <michael@niedermayer.cc>
Vicente Olivert Riera authored on 2015/12/03 22:22:17Showing 2 changed files
| ... | ... |
@@ -382,7 +382,6 @@ Optimization options (experts only): |
| 382 | 382 |
--disable-neon disable NEON optimizations |
| 383 | 383 |
--disable-inline-asm disable use of inline assembly |
| 384 | 384 |
--disable-yasm disable use of nasm/yasm assembly |
| 385 |
- --disable-mips32r5 disable MIPS32R5 optimizations |
|
| 386 | 385 |
--disable-mips64r6 disable MIPS64R6 optimizations |
| 387 | 386 |
--disable-mipsdsp disable MIPS DSP ASE R1 optimizations |
| 388 | 387 |
--disable-mipsdspr2 disable MIPS DSP ASE R2 optimizations |
| ... | ... |
@@ -1646,7 +1645,6 @@ ARCH_EXT_LIST_ARM=" |
| 1646 | 1646 |
ARCH_EXT_LIST_MIPS=" |
| 1647 | 1647 |
mipsfpu |
| 1648 | 1648 |
mips32r2 |
| 1649 |
- mips32r5 |
|
| 1650 | 1649 |
mips64r6 |
| 1651 | 1650 |
mipsdsp |
| 1652 | 1651 |
mipsdspr2 |
| ... | ... |
@@ -2130,7 +2128,6 @@ mipsfpu_deps="mips" |
| 2130 | 2130 |
mipsdsp_deps="mips" |
| 2131 | 2131 |
mipsdspr2_deps="mips" |
| 2132 | 2132 |
mips32r2_deps="mips" |
| 2133 |
-mips32r5_deps="mips" |
|
| 2134 | 2133 |
mips64r6_deps="mips" |
| 2135 | 2134 |
msa_deps="mips" |
| 2136 | 2135 |
mmi_deps="mips" |
| ... | ... |
@@ -4087,7 +4084,6 @@ elif enabled mips; then |
| 4087 | 4087 |
|
| 4088 | 4088 |
case $cpu in |
| 4089 | 4089 |
24kc) |
| 4090 |
- disable mips32r5 |
|
| 4091 | 4090 |
disable mips64r6 |
| 4092 | 4091 |
disable mipsfpu |
| 4093 | 4092 |
disable mipsdsp |
| ... | ... |
@@ -4095,33 +4091,28 @@ elif enabled mips; then |
| 4095 | 4095 |
disable msa |
| 4096 | 4096 |
;; |
| 4097 | 4097 |
24kf*) |
| 4098 |
- disable mips32r5 |
|
| 4099 | 4098 |
disable mips64r6 |
| 4100 | 4099 |
disable mipsdsp |
| 4101 | 4100 |
disable mipsdspr2 |
| 4102 | 4101 |
disable msa |
| 4103 | 4102 |
;; |
| 4104 | 4103 |
24kec|34kc|1004kc) |
| 4105 |
- disable mips32r5 |
|
| 4106 | 4104 |
disable mips64r6 |
| 4107 | 4105 |
disable mipsfpu |
| 4108 | 4106 |
disable mipsdspr2 |
| 4109 | 4107 |
disable msa |
| 4110 | 4108 |
;; |
| 4111 | 4109 |
24kef*|34kf*|1004kf*) |
| 4112 |
- disable mips32r5 |
|
| 4113 | 4110 |
disable mips64r6 |
| 4114 | 4111 |
disable mipsdspr2 |
| 4115 | 4112 |
disable msa |
| 4116 | 4113 |
;; |
| 4117 | 4114 |
74kc) |
| 4118 |
- disable mips32r5 |
|
| 4119 | 4115 |
disable mips64r6 |
| 4120 | 4116 |
disable mipsfpu |
| 4121 | 4117 |
disable msa |
| 4122 | 4118 |
;; |
| 4123 | 4119 |
74kf) |
| 4124 |
- disable mips32r5 |
|
| 4125 | 4120 |
disable mips64r6 |
| 4126 | 4121 |
disable msa |
| 4127 | 4122 |
;; |
| ... | ... |
@@ -4133,7 +4124,6 @@ elif enabled mips; then |
| 4133 | 4133 |
check_cflags "-mtune=p5600" |
| 4134 | 4134 |
;; |
| 4135 | 4135 |
i6400) |
| 4136 |
- disable mips32r5 |
|
| 4137 | 4136 |
disable mipsdsp |
| 4138 | 4137 |
disable mipsdspr2 |
| 4139 | 4138 |
disable mipsfpu |
| ... | ... |
@@ -4144,7 +4134,6 @@ elif enabled mips; then |
| 4144 | 4144 |
loongson*) |
| 4145 | 4145 |
disable mipsfpu |
| 4146 | 4146 |
disable mips32r2 |
| 4147 |
- disable mips32r5 |
|
| 4148 | 4147 |
disable mips64r6 |
| 4149 | 4148 |
disable mipsdsp |
| 4150 | 4149 |
disable mipsdspr2 |
| ... | ... |
@@ -4169,14 +4158,12 @@ elif enabled mips; then |
| 4169 | 4169 |
esac |
| 4170 | 4170 |
;; |
| 4171 | 4171 |
generic) |
| 4172 |
- disable mips32r5 |
|
| 4173 | 4172 |
disable mips64r6 |
| 4174 | 4173 |
disable msa |
| 4175 | 4174 |
;; |
| 4176 | 4175 |
*) |
| 4177 | 4176 |
disable mipsfpu |
| 4178 | 4177 |
disable mips32r2 |
| 4179 |
- disable mips32r5 |
|
| 4180 | 4178 |
disable mips64r6 |
| 4181 | 4179 |
disable mipsdsp |
| 4182 | 4180 |
disable mipsdspr2 |
| ... | ... |
@@ -4983,14 +4970,11 @@ elif enabled mips; then |
| 4983 | 4983 |
elif enabled mipsdsp || enabled mipsdspr2; then |
| 4984 | 4984 |
add_cflags "-mips32r2 -mfp32" |
| 4985 | 4985 |
add_asflags "-mips32r2 -mfp32" |
| 4986 |
- elif enabled mips32r5 || enabled mips64r6; then |
|
| 4986 |
+ elif enabled mips64r6; then |
|
| 4987 | 4987 |
check_cflags "-mfp64" |
| 4988 | 4988 |
check_ldflags "-mfp64" |
| 4989 | 4989 |
fi |
| 4990 | 4990 |
|
| 4991 |
- enabled mips32r5 && check_cflags "-mips32r5 -msched-weight -mload-store-pairs -funroll-loops" && |
|
| 4992 |
- check_ldflags "-mips32r5" && |
|
| 4993 |
- check_inline_asm mips32r5 '"ulw $t0, ($t1)"' |
|
| 4994 | 4991 |
enabled mips64r6 && check_cflags "-mips64r6 -msched-weight -mload-store-pairs -funroll-loops" && |
| 4995 | 4992 |
check_ldflags "-mips64r6" && |
| 4996 | 4993 |
check_inline_asm mips64r6 '"aui $t0, $t1, 1"' |
| ... | ... |
@@ -5003,7 +4987,6 @@ elif enabled mips; then |
| 5003 | 5003 |
enabled msa && check_cflags "-mmsa" && check_ldflags "-mmsa" && |
| 5004 | 5004 |
check_inline_asm msa '"addvi.b $w0, $w1, 1"' |
| 5005 | 5005 |
|
| 5006 |
- enabled mips32r5 && add_asflags "-mips32r5 -mfp64" |
|
| 5007 | 5006 |
enabled mips64r6 && add_asflags "-mips64r6 -mfp64" |
| 5008 | 5007 |
enabled msa && add_asflags "-mmsa" |
| 5009 | 5008 |
|
| ... | ... |
@@ -6075,7 +6058,6 @@ if enabled arm; then |
| 6075 | 6075 |
fi |
| 6076 | 6076 |
if enabled mips; then |
| 6077 | 6077 |
echo "MIPS FPU enabled ${mipsfpu-no}"
|
| 6078 |
- echo "MIPS32R5 enabled ${mips32r5-no}"
|
|
| 6079 | 6078 |
echo "MIPS64R6 enabled ${mips64r6-no}"
|
| 6080 | 6079 |
echo "MIPS DSP R1 enabled ${mipsdsp-no}"
|
| 6081 | 6080 |
echo "MIPS DSP R2 enabled ${mipsdspr2-no}"
|