From ffb4b625e8b2f0ce0f31433564973eb2c80a7ef5 Mon Sep 17 00:00:00 2001
From: Alexey Makhalov <amakhalov@vmware.com>
Date: Tue, 9 May 2017 12:41:17 -0700
Subject: [PATCH] vmware only

---
 arch/x86/kernel/cpu/common.c | 2 ++
 arch/x86/kernel/cpu/rdrand.c | 2 ++
 arch/x86/kernel/cpu/vmware.c | 5 +++++
 arch/x86/kernel/smpboot.c    | 2 +-
 4 files changed, 10 insertions(+), 1 deletion(-)

diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 4eece91ada37..5b8e45f48bf3 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -1089,7 +1089,9 @@ static void identify_cpu(struct cpuinfo_x86 *c)
 #endif
 
 	init_hypervisor(c);
+#if 0 /* disable rdrand probbing */
 	x86_init_rdrand(c);
+#endif
 	x86_init_cache_qos(c);
 	setup_pku(c);
 
diff --git a/arch/x86/kernel/cpu/rdrand.c b/arch/x86/kernel/cpu/rdrand.c
index cfa97ff67bda..e31cfe683da2 100644
--- a/arch/x86/kernel/cpu/rdrand.c
+++ b/arch/x86/kernel/cpu/rdrand.c
@@ -32,6 +32,7 @@ static int __init x86_rdrand_setup(char *s)
 }
 __setup("nordrand", x86_rdrand_setup);
 
+#if 0
 /*
  * RDRAND has Built-In-Self-Test (BIST) that runs on every invocation.
  * Run the instruction a few times as a sanity check.
@@ -57,3 +58,4 @@ void x86_init_rdrand(struct cpuinfo_x86 *c)
 	}
 }
 #endif
+#endif
diff --git a/arch/x86/kernel/cpu/vmware.c b/arch/x86/kernel/cpu/vmware.c
index 0e1fc6e17efc..59e2cc6a70d2 100644
--- a/arch/x86/kernel/cpu/vmware.c
+++ b/arch/x86/kernel/cpu/vmware.c
@@ -30,6 +30,7 @@
 #include <asm/hypervisor.h>
 #include <asm/timer.h>
 #include <asm/apic.h>
+#include <asm/pci_x86.h>
 #include <linux/sched.h>
 #include <linux/cpu.h>
 #include <linux/kmsg_dump.h>
@@ -378,6 +379,10 @@ static void __init vmware_platform_setup(void)
 
 	vmware_paravirt_ops_setup();
 	kmsg_dump_register(&kmsg_dumper);
+#ifdef CONFIG_PCI
+	/* PCI BIOS service won't work from a PV guest. */
+	pci_probe &= ~PCI_PROBE_BIOS;
+#endif
 }
 
 /*
diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c
index 36171bcd91f8..f7f3d0b4b882 100644
--- a/arch/x86/kernel/smpboot.c
+++ b/arch/x86/kernel/smpboot.c
@@ -683,7 +683,7 @@ wakeup_secondary_cpu_via_nmi(int apicid, unsigned long start_eip)
 	/*
 	 * Give the other CPU some time to accept the IPI.
 	 */
-	udelay(200);
+//	udelay(200);
 	if (APIC_INTEGRATED(boot_cpu_apic_version)) {
 		maxlvt = lapic_get_maxlvt();
 		if (maxlvt > 3)			/* Due to the Pentium erratum 3AP.  */
-- 
2.11.0