Browse code
BUG 1965000 : Fix for [CVE-2017-11671] in gcc
Change-Id: Ibc3c60b65d8cb1c96482de494f460f5c2497c523
Reviewed-on: http://photon-jenkins.eng.vmware.com:8082/5266
Tested-by: gerrit-photon <photon-checkins@vmware.com>
Reviewed-by: Tapas Kundu <tkundu@vmware.com>
Reviewed-by: Sharath George
Keerthana K authored on 2018/06/15 00:45:03Showing 2 changed files
| 1 | 1 |
new file mode 100644 |
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@@ -0,0 +1,69 @@ |
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+Index: config/i386/i386.c |
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+=================================================================== |
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+--- a/gcc/config/i386/i386.c (revision 246473) |
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+@@ -37572,9 +37572,6 @@ ix86_expand_builtin (tree exp, rtx target, rtx sub |
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+ mode0 = DImode; |
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+ |
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+ rdrand_step: |
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+- op0 = gen_reg_rtx (mode0); |
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+- emit_insn (GEN_FCN (icode) (op0)); |
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+- |
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+ arg0 = CALL_EXPR_ARG (exp, 0); |
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+ op1 = expand_normal (arg0); |
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+ if (!address_operand (op1, VOIDmode)) |
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+@@ -37582,6 +37579,10 @@ rdrand_step: |
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+ op1 = convert_memory_address (Pmode, op1); |
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+ op1 = copy_addr_to_reg (op1); |
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+ } |
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++ |
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++ op0 = gen_reg_rtx (mode0); |
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++ emit_insn (GEN_FCN (icode) (op0)); |
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++ |
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+ emit_move_insn (gen_rtx_MEM (mode0, op1), op0); |
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+ |
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+ op1 = gen_reg_rtx (SImode); |
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+@@ -37590,8 +37591,20 @@ rdrand_step: |
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+ /* Emit SImode conditional move. */ |
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+ if (mode0 == HImode) |
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+ {
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+- op2 = gen_reg_rtx (SImode); |
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+- emit_insn (gen_zero_extendhisi2 (op2, op0)); |
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++ if (TARGET_ZERO_EXTEND_WITH_AND |
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++ && optimize_function_for_speed_p (cfun)) |
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++ {
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++ op2 = force_reg (SImode, const0_rtx); |
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++ |
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++ emit_insn (gen_movstricthi |
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++ (gen_lowpart (HImode, op2), op0)); |
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++ } |
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++ else |
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++ {
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++ op2 = gen_reg_rtx (SImode); |
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++ |
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++ emit_insn (gen_zero_extendhisi2 (op2, op0)); |
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++ } |
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+ } |
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+ else if (mode0 == SImode) |
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+ op2 = op0; |
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+@@ -37623,9 +37636,6 @@ rdrand_step: |
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+ mode0 = DImode; |
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+ |
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+ rdseed_step: |
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+- op0 = gen_reg_rtx (mode0); |
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+- emit_insn (GEN_FCN (icode) (op0)); |
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+- |
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+ arg0 = CALL_EXPR_ARG (exp, 0); |
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+ op1 = expand_normal (arg0); |
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+ if (!address_operand (op1, VOIDmode)) |
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+@@ -37633,6 +37643,10 @@ rdseed_step: |
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+ op1 = convert_memory_address (Pmode, op1); |
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+ op1 = copy_addr_to_reg (op1); |
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+ } |
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++ |
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++ op0 = gen_reg_rtx (mode0); |
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++ emit_insn (GEN_FCN (icode) (op0)); |
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++ |
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+ emit_move_insn (gen_rtx_MEM (mode0, op1), op0); |
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+ |
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+ op2 = gen_reg_rtx (QImode); |
| ... | ... |
@@ -2,7 +2,7 @@ |
| 2 | 2 |
Summary: Contains the GNU compiler collection |
| 3 | 3 |
Name: gcc |
| 4 | 4 |
Version: 5.3.0 |
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-Release: 4%{?dist}
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+Release: 5%{?dist}
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| 6 | 6 |
License: GPLv2+ |
| 7 | 7 |
URL: http://gcc.gnu.org |
| 8 | 8 |
Group: Development/Tools |
| ... | ... |
@@ -10,6 +10,7 @@ Vendor: VMware, Inc. |
| 10 | 10 |
Distribution: Photon |
| 11 | 11 |
Source0: http://ftp.gnu.org/gnu/gcc/%{name}-%{version}/%{name}-%{version}.tar.bz2
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| 12 | 12 |
%define sha1 gcc=0612270b103941da08376df4d0ef4e5662a2e9eb |
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+Patch0: gcc-CVE-2017-11671.patch |
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| 13 | 14 |
Requires: libstdc++-devel = %{version}-%{release}
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| 14 | 15 |
Requires: libgcc-devel = %{version}-%{release}
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| 15 | 16 |
Requires: libgomp-devel = %{version}-%{release}
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| ... | ... |
@@ -71,6 +72,7 @@ This package contains development headers and static library for libgomp |
| 71 | 71 |
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| 72 | 72 |
%prep |
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%setup -q |
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+%patch0 -p1 |
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sed -i '/*cpp:/s/^/# /' `dirname $(gcc --print-libgcc-file-name)`/../specs |
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sed -i '/Ofast:-D_FORTIFY_SOURCE=2/s/^/# /' `dirname $(gcc --print-libgcc-file-name)`/../specs |
| 76 | 77 |
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@@ -211,6 +213,8 @@ make -k check |& tee %{_specdir}/%{name}-check-log || %{nocheck}
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| 211 | 211 |
%endif |
| 212 | 212 |
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%changelog |
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+* Thu Jun 14 2018 Keerthana K <keerthanak@vmware.com> 5.3.0-5 |
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+- Fix for CVE-2017-11671. |
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* Thu Jun 29 2017 Divya Thaluru <dthaluru@vmware.com> 5.3.0-4 |
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- Bump release to built with latest toolchain |
| 216 | 218 |
* Tue May 24 2016 Priyesh Padmavilasom <ppadmavilasom@vmware.com> 5.3.0-3 |