1. photon
  2. Commit becc5c79b904ac8b1e96cfa434378bf62a0ddb5d
Browse code

pv-ops improvements + initrd support + openvswitch

Change-Id: I606bd6726da3a562b450003cf734d8f48920f46d
Reviewed-on: http://photon-jenkins.eng.vmware.com/80
Tested-by: jenkins-photon <wangnan2015@hotmail.com>
Reviewed-by: Harish Udaiya Kumar <harishspqr@gmail.com>
Reviewed-by: Sharath George

Alexey Makhalov authored on 2015/10/29 07:12:31
Showing 19 changed files
SPECS/linux/01-blkdev-max-rq.patch
History View file @ becc5c7
1 1 
deleted file mode 100644
... ... 
@@ -1,11 +0,0 @@
1 
-+++ linux-4.2/include/linux/blkdev.h	2015-08-31 19:43:19.129320398 +0000
2 
-@@ -37,7 +37,7 @@
3 
- struct blk_flush_queue;
4 
-
5 
- #define BLKDEV_MIN_RQ	4
6 
--#define BLKDEV_MAX_RQ	128	/* Default maximum */
7 
-+#define BLKDEV_MAX_RQ	4096	/* Default maximum */
8 
-
9 
- /*
10 
-  * Maximum number of blkcg policies allowed to be registered concurrently.
SPECS/linux/01-clear-linux.patch
History View file @ becc5c7
11 1 
new file mode 100644
... ... 
@@ -0,0 +1,203 @@
0 
+From f08c191ec706f9f381e992709262650dba07f0f3 Mon Sep 17 00:00:00 2001
1 
+From: Alexey Makhalov <amakhalov@vmware.com>
2 
+Date: Tue, 29 Sep 2015 15:58:41 -0700
3 
+Subject: [PATCH] clean linux patch set.
4 
+
5 
+---
6 
+ arch/x86/kernel/cpu/perf_event_intel.c    |  2 +-
7 
+ arch/x86/kernel/cpu/perf_event_intel_pt.c |  4 ++++
8 
+ arch/x86/kernel/tsc.c                     |  3 +++
9 
+ drivers/tty/sysrq.c                       |  4 +++-
10 
+ drivers/video/console/fbcon.c             |  2 +-
11 
+ include/linux/blkdev.h                    |  2 +-
12 
+ init/do_mounts.c                          |  4 +++-
13 
+ kernel/fork.c                             | 39 ++++++++++++++++++-------------
14 
+ mm/vmstat.c                               |  2 +-
15 
+ 9 files changed, 40 insertions(+), 22 deletions(-)
16 
+
17 
+diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c
18 
+index 6326ae2..136a14b 100644
19 
+--- a/arch/x86/kernel/cpu/perf_event_intel.c
20 
+@@ -3338,7 +3338,7 @@ __init int intel_pmu_init(void)
21 
+ 	 */
22 
+ 	if (x86_pmu.extra_regs) {
23 
+ 		for (er = x86_pmu.extra_regs; er->msr; er++) {
24 
+-			er->extra_msr_access = check_msr(er->msr, 0x1ffUL);
25 
++			er->extra_msr_access = false;
26 
+ 			/* Disable LBR select mapping */
27 
+ 			if ((er->idx == EXTRA_REG_LBR) && !er->extra_msr_access)
28 
+ 				x86_pmu.lbr_sel_map = NULL;
29 
+diff --git a/arch/x86/kernel/cpu/perf_event_intel_pt.c b/arch/x86/kernel/cpu/perf_event_intel_pt.c
30 
+index 183de71..f205baf 100644
31 
+--- a/arch/x86/kernel/cpu/perf_event_intel_pt.c
32 
+@@ -1060,6 +1060,10 @@ static __init int pt_init(void)
33 
+ {
34 
+ 	int ret, cpu, prior_warn = 0;
35 
+
36 
++
37 
++	if (!test_cpu_cap(&boot_cpu_data, X86_FEATURE_INTEL_PT))
38 
++		return -ENODEV;
39 
++
40 
+ 	BUILD_BUG_ON(sizeof(struct topa) > PAGE_SIZE);
41 
+ 	get_online_cpus();
42 
+ 	for_each_online_cpu(cpu) {
43 
+diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c
44 
+index 7437b41..c6f2c49 100644
45 
+--- a/arch/x86/kernel/tsc.c
46 
+@@ -1241,6 +1241,9 @@ unsigned long calibrate_delay_is_known(void)
47 
+ 	if (!tsc_disabled && !cpu_has(&cpu_data(cpu), X86_FEATURE_CONSTANT_TSC))
48 
+ 		return 0;
49 
+
50 
++	if (cpu != 0)
51 
++		return cpu_data(0).loops_per_jiffy;
52 
++
53 
+ 	for_each_online_cpu(i)
54 
+ 		if (cpu_data(i).phys_proc_id == cpu_data(cpu).phys_proc_id)
55 
+ 			return cpu_data(i).loops_per_jiffy;
56 
+diff --git a/drivers/tty/sysrq.c b/drivers/tty/sysrq.c
57 
+index b5b4278..ec1bb75 100644
58 
+--- a/drivers/tty/sysrq.c
59 
+@@ -1047,8 +1047,10 @@ static int __sysrq_swap_key_ops(int key, struct sysrq_key_op *insert_op_p,
60 
+ 	 * A concurrent __handle_sysrq either got the old op or the new op.
61 
+ 	 * Wait for it to go away before returning, so the code for an old
62 
+ 	 * op is not freed (eg. on module unload) while it is in use.
63 
++	 * This is only relevant if the old op is not NULL of course.
64 
+ 	 */
65 
+-	synchronize_rcu();
66 
++	if (remove_op_p)
67 
++		synchronize_rcu();
68 
+
69 
+ 	return retval;
70 
+ }
71 
+diff --git a/drivers/video/console/fbcon.c b/drivers/video/console/fbcon.c
72 
+index 1aaf893..ac6c143 100644
73 
+--- a/drivers/video/console/fbcon.c
74 
+@@ -146,7 +146,7 @@ static const struct consw fb_con;
75 
+
76 
+ static int fbcon_set_origin(struct vc_data *);
77 
+
78 
+-static int fbcon_cursor_noblink;
79 
++static int fbcon_cursor_noblink = 1;
80 
+
81 
+ #define divides(a, b)	((!(a) || (b)%(a)) ? 0 : 1)
82 
+
83 
+diff --git a/include/linux/blkdev.h b/include/linux/blkdev.h
84 
+index d4068c1..1dfe7ef 100644
85 
+--- a/include/linux/blkdev.h
86 
+@@ -37,7 +37,7 @@ struct blkcg_gq;
87 
+ struct blk_flush_queue;
88 
+
89 
+ #define BLKDEV_MIN_RQ	4
90 
+-#define BLKDEV_MAX_RQ	128	/* Default maximum */
91 
++#define BLKDEV_MAX_RQ	4096	/* Default maximum */
92 
+
93 
+ /*
94 
+  * Maximum number of blkcg policies allowed to be registered concurrently.
95 
+diff --git a/init/do_mounts.c b/init/do_mounts.c
96 
+index dea5de9..da84094 100644
97 
+--- a/init/do_mounts.c
98 
+@@ -28,6 +28,7 @@
99 
+ #include <linux/slab.h>
100 
+ #include <linux/ramfs.h>
101 
+ #include <linux/shmem_fs.h>
102 
++#include <linux/async.h>
103 
+
104 
+ #include <linux/nfs_fs.h>
105 
+ #include <linux/nfs_fs_sb.h>
106 
+@@ -563,7 +564,8 @@ void __init prepare_namespace(void)
107 
+ 	 * For example, it is not atypical to wait 5 seconds here
108 
+ 	 * for the touchpad of a laptop to initialize.
109 
+ 	 */
110 
+-	wait_for_device_probe();
111 
++	//wait_for_device_probe();
112 
++	async_synchronize_full();
113 
+
114 
+ 	md_run_setup();
115 
+
116 
+diff --git a/kernel/fork.c b/kernel/fork.c
117 
+index dbd9b8d..a84f4b5 100644
118 
+--- a/kernel/fork.c
119 
+@@ -74,6 +74,7 @@
120 
+ #include <linux/uprobes.h>
121 
+ #include <linux/aio.h>
122 
+ #include <linux/compiler.h>
123 
++#include <linux/async.h>
124 
+ #include <linux/sysctl.h>
125 
+
126 
+ #include <asm/pgtable.h>
127 
+@@ -685,6 +686,26 @@ void __mmdrop(struct mm_struct *mm)
128 
+ }
129 
+ EXPORT_SYMBOL_GPL(__mmdrop);
130 
+
131 
++
132 
++static void mmput_async(void *data, async_cookie_t cookie)
133 
++{
134 
++	struct mm_struct *mm = data;
135 
++	uprobe_clear_state(mm);
136 
++	exit_aio(mm);
137 
++	ksm_exit(mm);
138 
++	khugepaged_exit(mm); /* must run before exit_mmap */
139 
++	exit_mmap(mm);
140 
++	set_mm_exe_file(mm, NULL);
141 
++	if (!list_empty(&mm->mmlist)) {
142 
++		spin_lock(&mmlist_lock);
143 
++		list_del(&mm->mmlist);
144 
++		spin_unlock(&mmlist_lock);
145 
++	}
146 
++	if (mm->binfmt)
147 
++		module_put(mm->binfmt->module);
148 
++	mmdrop(mm);
149 
++}
150 
++
151 
+ /*
152 
+  * Decrement the use count and release all resources for an mm.
153 
+  */
154 
+@@ -692,22 +713,8 @@ void mmput(struct mm_struct *mm)
155 
+ {
156 
+ 	might_sleep();
157 
+
158 
+-	if (atomic_dec_and_test(&mm->mm_users)) {
159 
+-		uprobe_clear_state(mm);
160 
+-		exit_aio(mm);
161 
+-		ksm_exit(mm);
162 
+-		khugepaged_exit(mm); /* must run before exit_mmap */
163 
+-		exit_mmap(mm);
164 
+-		set_mm_exe_file(mm, NULL);
165 
+-		if (!list_empty(&mm->mmlist)) {
166 
+-			spin_lock(&mmlist_lock);
167 
+-			list_del(&mm->mmlist);
168 
+-			spin_unlock(&mmlist_lock);
169 
+-		}
170 
+-		if (mm->binfmt)
171 
+-			module_put(mm->binfmt->module);
172 
+-		mmdrop(mm);
173 
+-	}
174 
++	if (atomic_dec_and_test(&mm->mm_users))
175 
++		async_schedule(mmput_async, mm);
176 
+ }
177 
+ EXPORT_SYMBOL_GPL(mmput);
178 
+
179 
+diff --git a/mm/vmstat.c b/mm/vmstat.c
180 
+index 4f5cd97..c176f8b 100644
181 
+--- a/mm/vmstat.c
182 
+@@ -1358,7 +1358,7 @@ static const struct file_operations proc_vmstat_file_operations = {
183 
+
184 
+ #ifdef CONFIG_SMP
185 
+ static DEFINE_PER_CPU(struct delayed_work, vmstat_work);
186 
+-int sysctl_stat_interval __read_mostly = HZ;
187 
++int sysctl_stat_interval __read_mostly = 8 * HZ;
188 
+ static cpumask_var_t cpu_stat_off;
189 
+
190 
+ static void vmstat_update(struct work_struct *w)
191 
+--
192 
+1.9.1
193 
+
SPECS/linux/02-pci-probe.patch
History View file @ becc5c7
0 194 
new file mode 100644
... ... 
@@ -0,0 +1,370 @@
0 
+From 017e5bbfc985494ee7116e4c92005c53b1ce68ab Mon Sep 17 00:00:00 2001
1 
+From: Alexey Makhalov <amakhalov@vmware.com>
2 
+Date: Tue, 29 Sep 2015 15:55:49 -0700
3 
+Subject: [PATCH] pci/probe.c: Hardcodded pci probe.
4 
+
5 
+---
6 
+ drivers/pci/probe.c | 312 +++++++++++++++++++++++++++++++++++++++++++++++++++-
7 
+ 1 file changed, 310 insertions(+), 2 deletions(-)
8 
+
9 
+diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
10 
+index f6ae0d0..6ecda24 100644
11 
+--- a/drivers/pci/probe.c
12 
+@@ -159,6 +159,281 @@ static inline unsigned long decode_bar(struct pci_dev *dev, u32 bar)
13 
+
14 
+ #define PCI_COMMAND_DECODE_ENABLE	(PCI_COMMAND_MEMORY | PCI_COMMAND_IO)
15 
+
16 
++
17 
++/* shortcut version of __pci_read_base where we know the sizes already */
18 
++int __pci_read_base_shortcut(struct pci_dev *dev, enum pci_bar_type type,
19 
++		    struct resource *res, unsigned int pos, u32 sz_in, u32 sz2_in)
20 
++{
21 
++	u32 l, sz;
22 
++	u64 l64, sz64, mask64;
23 
++	struct pci_bus_region region, inverted_region;
24 
++
25 
++	res->name = pci_name(dev);
26 
++
27 
++	pci_read_config_dword(dev, pos, &l);
28 
++
29 
++	sz = sz_in;
30 
++
31 
++	/*
32 
++	 * All bits set in sz means the device isn't working properly.
33 
++	 * If the BAR isn't implemented, all bits must be 0.  If it's a
34 
++	 * memory BAR or a ROM, bit 0 must be clear; if it's an io BAR, bit
35 
++	 * 1 must be clear.
36 
++	 * Here we set the size and is not 0xffffffff
37 
++	 */
38 
++
39 
++	/*
40 
++	 * I don't know how l can have all bits set.  Copied from old code.
41 
++	 * Maybe it fixes a bug on some ancient platform.
42 
++	 */
43 
++	if (l == 0xffffffff)
44 
++		l = 0;
45 
++
46 
++	if (type == pci_bar_unknown) {
47 
++		res->flags = decode_bar(dev, l);
48 
++		res->flags |= IORESOURCE_SIZEALIGN;
49 
++		if (res->flags & IORESOURCE_IO) {
50 
++			l64 = l & PCI_BASE_ADDRESS_IO_MASK;
51 
++			sz64 = sz & PCI_BASE_ADDRESS_IO_MASK;
52 
++			mask64 = PCI_BASE_ADDRESS_IO_MASK & (u32)IO_SPACE_LIMIT;
53 
++		} else {
54 
++			l64 = l & PCI_BASE_ADDRESS_MEM_MASK;
55 
++			sz64 = sz & PCI_BASE_ADDRESS_MEM_MASK;
56 
++			mask64 = (u32)PCI_BASE_ADDRESS_MEM_MASK;
57 
++		}
58 
++	} else {
59 
++		res->flags |= (l & IORESOURCE_ROM_ENABLE);
60 
++		l64 = l & PCI_ROM_ADDRESS_MASK;
61 
++		sz64 = sz & PCI_ROM_ADDRESS_MASK;
62 
++		mask64 = (u32)PCI_ROM_ADDRESS_MASK;
63 
++	}
64 
++
65 
++	if (res->flags & IORESOURCE_MEM_64) {
66 
++		pci_read_config_dword(dev, pos + 4, &l);
67 
++		sz = sz2_in;
68 
++
69 
++		l64 |= ((u64)l << 32);
70 
++		sz64 |= ((u64)sz << 32);
71 
++		mask64 |= ((u64)~0 << 32);
72 
++	}
73 
++
74 
++	if (!sz64)
75 
++		goto fail;
76 
++
77 
++	sz64 = pci_size(l64, sz64, mask64);
78 
++	if (!sz64) {
79 
++		dev_info(&dev->dev, FW_BUG "reg 0x%x: invalid BAR (can't size)\n",
80 
++			 pos);
81 
++		goto fail;
82 
++	}
83 
++
84 
++	if (res->flags & IORESOURCE_MEM_64) {
85 
++		if ((sizeof(dma_addr_t) < 8 || sizeof(resource_size_t) < 8) &&
86 
++		    sz64 > 0x100000000ULL) {
87 
++			res->flags |= IORESOURCE_UNSET | IORESOURCE_DISABLED;
88 
++			res->start = 0;
89 
++			res->end = 0;
90 
++			dev_err(&dev->dev, "reg 0x%x: can't handle BAR larger than 4GB (size %#010llx)\n",
91 
++				pos, (unsigned long long)sz64);
92 
++			goto out;
93 
++		}
94 
++
95 
++		if ((sizeof(dma_addr_t) < 8) && l) {
96 
++			/* Above 32-bit boundary; try to reallocate */
97 
++			res->flags |= IORESOURCE_UNSET;
98 
++			res->start = 0;
99 
++			res->end = sz64;
100 
++			dev_info(&dev->dev, "reg 0x%x: can't handle BAR above 4GB (bus address %#010llx)\n",
101 
++				 pos, (unsigned long long)l64);
102 
++			goto out;
103 
++		}
104 
++	}
105 
++
106 
++	region.start = l64;
107 
++	region.end = l64 + sz64;
108 
++
109 
++	pcibios_bus_to_resource(dev->bus, res, &region);
110 
++	pcibios_resource_to_bus(dev->bus, &inverted_region, res);
111 
++
112 
++	/*
113 
++	 * If "A" is a BAR value (a bus address), "bus_to_resource(A)" is
114 
++	 * the corresponding resource address (the physical address used by
115 
++	 * the CPU.  Converting that resource address back to a bus address
116 
++	 * should yield the original BAR value:
117 
++	 *
118 
++	 *     resource_to_bus(bus_to_resource(A)) == A
119 
++	 *
120 
++	 * If it doesn't, CPU accesses to "bus_to_resource(A)" will not
121 
++	 * be claimed by the device.
122 
++	 */
123 
++	if (inverted_region.start != region.start) {
124 
++		res->flags |= IORESOURCE_UNSET;
125 
++		res->start = 0;
126 
++		res->end = region.end - region.start;
127 
++		dev_info(&dev->dev, "reg 0x%x: initial BAR value %#010llx invalid\n",
128 
++			 pos, (unsigned long long)region.start);
129 
++	}
130 
++
131 
++	goto out;
132 
++
133 
++
134 
++fail:
135 
++	res->flags = 0;
136 
++out:
137 
++	if (res->flags)
138 
++		dev_printk(KERN_DEBUG, &dev->dev, "reg 0x%x: %pR\n", pos, res);
139 
++
140 
++	return (res->flags & IORESOURCE_MEM_64) ? 1 : 0;
141 
++}
142 
++
143 
++static int is_known_device(struct pci_dev *dev, int pos, int *sz)
144 
++{
145 
++	switch (dev->vendor) {
146 
++		/* Intel Corporation */
147 
++		case 0x8086:
148 
++		switch (dev->device) {
149 
++			/* IDE interface: 82371AB/EB/MB PIIX4 IDE */
150 
++			case 0x7111:
151 
++			switch (pos) {
152 
++				case 0x20:
153 
++					*sz = 0xfffffff1;
154 
++					return 1;
155 
++				case 0x10:
156 
++				case 0x14:
157 
++				case 0x18:
158 
++				case 0x1c:
159 
++				case 0x24:
160 
++				case 0x30:
161 
++					*sz = 0; /* Not implemented */
162 
++					return 1;
163 
++			}
164 
++			break;
165 
++
166 
++			/* Bridge: 82371AB/EB/MB PIIX4 ACPI */
167 
++			case 0x7113:
168 
++			switch (pos) {
169 
++				case 0x10:
170 
++				case 0x14:
171 
++				case 0x18:
172 
++				case 0x1c:
173 
++				case 0x20:
174 
++				case 0x24:
175 
++				case 0x30:
176 
++					*sz = 0; /* Not implemented */
177 
++					return 1;
178 
++			}
179 
++			break;
180 
++		}
181 
++		break;
182 
++
183 
++		/* VMware, Inc */
184 
++		case 0x15ad:
185 
++		switch (dev->device) {
186 
++			/* VMware SVGA II Adapter */
187 
++			case 0x0405:
188 
++			switch (pos) {
189 
++				case 0x10:
190 
++					*sz = 0xfffffff1;
191 
++					return 1;
192 
++				case 0x14:
193 
++					*sz = 0xfc000000;
194 
++					return 1;
195 
++				case 0x18:
196 
++					*sz = 0xff800000;
197 
++					return 1;
198 
++				case 0x1c:
199 
++				case 0x20:
200 
++				case 0x24:
201 
++					*sz = 0; /* Not implemented */
202 
++					return 1;
203 
++				case 0x30:
204 
++					*sz = 0xffff8000;
205 
++					return 1;
206 
++			}
207 
++			break;
208 
++
209 
++			/* VMware Virtual Machine Communication Interface */
210 
++			case 0x0740:
211 
++			switch (pos) {
212 
++				case 0x10:
213 
++					*sz = 0xffffffc1;
214 
++					return 1;
215 
++				case 0x14:
216 
++					*sz = 0xffffe000;
217 
++					return 1;
218 
++				case 0x1c:
219 
++				case 0x20:
220 
++				case 0x24:
221 
++				case 0x30:
222 
++					*sz = 0; /* Not implemented */
223 
++					return 1;
224 
++			}
225 
++			break;
226 
++
227 
++			/* VMware PCI bridge */
228 
++			case 0x0790:
229 
++			/* VMware PCI Express Root Port */
230 
++			case 0x07a0:
231 
++			switch (pos) {
232 
++				case 0x10:
233 
++				case 0x14:
234 
++				case 0x38:
235 
++					*sz = 0; /* Not implemented */
236 
++					return 1;
237 
++			}
238 
++			break;
239 
++
240 
++			/* VMware VMXNET3 Ethernet Controller */
241 
++			case 0x07b0:
242 
++			switch (pos) {
243 
++				case 0x10:
244 
++					*sz = 0xfffff000;
245 
++					return 1;
246 
++				case 0x14:
247 
++					*sz = 0xfffff000;
248 
++					return 1;
249 
++				case 0x18:
250 
++					*sz = 0xffffe000;
251 
++					return 1;
252 
++				case 0x1c:
253 
++					*sz = 0xfffffff1;
254 
++					return 1;
255 
++				case 0x20:
256 
++				case 0x24:
257 
++					*sz = 0; /* Not implemented */
258 
++					return 1;
259 
++				case 0x30:
260 
++					*sz = 0xffff0000;
261 
++					return 1;
262 
++			}
263 
++			break;
264 
++
265 
++			/* VMware PVSCSI SCSI Controller */
266 
++			case 0x07c0:
267 
++			switch (pos) {
268 
++				case 0x10:
269 
++					*sz = 0xfffffff9;
270 
++					return 1;
271 
++				case 0x14:
272 
++					*sz = 0xffff8000;
273 
++					return 1;
274 
++				case 0x1c:
275 
++				case 0x20:
276 
++				case 0x24:
277 
++					*sz = 0; /* Not implemented */
278 
++					return 1;
279 
++				case 0x30:
280 
++					*sz = 0xffff0000;
281 
++					return 1;
282 
++			}
283 
++			break;
284 
++		}
285 
++		break;
286 
++
287 
++	}
288 
++        return 0;
289 
++}
290 
++
291 
+ /**
292 
+  * pci_read_base - read a PCI BAR
293 
+  * @dev: the PCI device
294 
+@@ -178,6 +453,13 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
295 
+
296 
+ 	mask = type ? PCI_ROM_ADDRESS_MASK : ~0;
297 
+
298 
++	if (is_known_device(dev, pos, &sz))
299 
++		return __pci_read_base_shortcut(dev, type, res, pos, sz, 0);
300 
++
301 
++	res->name = pci_name(dev);
302 
++
303 
++	printk("Starting probe for %s %x:%x:%x\n", res->name, dev->vendor, dev->device, pos);
304 
++
305 
+ 	/* No printks while decoding is disabled! */
306 
+ 	if (!dev->mmio_always_on) {
307 
+ 		pci_read_config_word(dev, PCI_COMMAND, &orig_cmd);
308 
+@@ -187,7 +469,6 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
309 
+ 		}
310 
+ 	}
311 
+
312 
+-	res->name = pci_name(dev);
313 
+
314 
+ 	pci_read_config_dword(dev, pos, &l);
315 
+ 	pci_write_config_dword(dev, pos, l | mask);
316 
+@@ -1108,6 +1389,28 @@ int pci_cfg_space_size(struct pci_dev *dev)
317 
+
318 
+ #define LEGACY_IO_RESOURCE	(IORESOURCE_IO | IORESOURCE_PCI_FIXED)
319 
+
320 
++static int guess_bar_count(int class)
321 
++{
322 
++        if (class == 0x068000)
323 
++            return 0;
324 
++        if (class == 0x020000)
325 
++            return 3;
326 
++        if (class == 0x010000)
327 
++            return 2;
328 
++        if (class == 0x00ff00)
329 
++            return 1;
330 
++        return 6;
331 
++}
332 
++
333 
++static int has_rom(int class, int rom)
334 
++{
335 
++        if (class == 0x020000)
336 
++          return 0;
337 
++        if (class == 0x010000 || class == 0x00ff00)
338 
++          return 0;
339 
++        return rom;
340 
++}
341 
++
342 
+ void pci_msi_setup_pci_dev(struct pci_dev *dev)
343 
+ {
344 
+ 	/*
345 
+@@ -1142,6 +1445,7 @@ int pci_setup_device(struct pci_dev *dev)
346 
+ 	int pos = 0;
347 
+ 	struct pci_bus_region region;
348 
+ 	struct resource *res;
349 
++	int maxbar;
350 
+
351 
+ 	if (pci_read_config_byte(dev, PCI_HEADER_TYPE, &hdr_type))
352 
+ 		return -EIO;
353 
+@@ -1191,7 +1495,11 @@ int pci_setup_device(struct pci_dev *dev)
354 
+ 		if (class == PCI_CLASS_BRIDGE_PCI)
355 
+ 			goto bad;
356 
+ 		pci_read_irq(dev);
357 
+-		pci_read_bases(dev, 6, PCI_ROM_ADDRESS);
358 
++
359 
++		maxbar = guess_bar_count(dev->class);
360 
++
361 
++		if (class != PCI_CLASS_STORAGE_IDE)
362 
++			pci_read_bases(dev, maxbar, has_rom(dev->class, PCI_ROM_ADDRESS));
363 
+ 		pci_read_config_word(dev, PCI_SUBSYSTEM_VENDOR_ID, &dev->subsystem_vendor);
364 
+ 		pci_read_config_word(dev, PCI_SUBSYSTEM_ID, &dev->subsystem_device);
365 
+
366 
+--
367 
+1.9.1
368 
+
SPECS/linux/02-sysrq-Skip-synchronize_rcu-if-there-is-no-old-op.patch
History View file @ becc5c7
0 369 
deleted file mode 100644
... ... 
@@ -1,32 +0,0 @@
1 
-From: Arjan van de Ven <arjan@linux.intel.com>
2 
-Date: Wed, 11 Feb 2015 16:25:16 -0600
3 
-Subject: [PATCH 03/13] sysrq: Skip synchronize_rcu() if there is no old op
4 
-
5 
-synchronize_rcu() is expensive. Currently it is called as part of the sysrq
6 
-registration/unregistration, which happens during boot several times.
7 
-Now, the reason for the synchronize_rcu() is to allow an old registered
8 
-operation to expire properly... which is pointless if the old operation
9 
-is NULL...
10 
-So we can save the common case of the old operation being NULL a lot of time
11 
-by just checking for non-NULL prior to the synchronize_rcu()
12 
-
13 
-Signed-off-by: Arjan van de Ven <arjan@linux.intel.com>
14 
-Signed-off-by: Miguel Bernal Marin <miguel.bernal.marin@linux.intel.com>
15 
- drivers/tty/sysrq.c | 4 +++-
16 
- 1 file changed, 3 insertions(+), 1 deletion(-)
17 
-
18 
-+++ linux-4.2/drivers/tty/sysrq.c	2015-08-31 19:43:31.561320030 +0000
19 
-@@ -1047,8 +1047,10 @@
20 
- 	 * A concurrent __handle_sysrq either got the old op or the new op.
21 
- 	 * Wait for it to go away before returning, so the code for an old
22 
- 	 * op is not freed (eg. on module unload) while it is in use.
23 
-+	 * This is only relevant if the old op is not NULL of course.
24 
- 	 */
25 
--	synchronize_rcu();
26 
-+	if (remove_op_p)
27 
-+		synchronize_rcu();
28 
-
29 
- 	return retval;
30 
- }
SPECS/linux/03-enable-no-blink-by-default.patch
History View file @ becc5c7
31 1 
deleted file mode 100644
... ... 
@@ -1,20 +0,0 @@
1 
-From: Jose Carlos Venegas Munoz <jos.c.venegas.munoz@intel.com>
2 
-Date: Mon, 13 Apr 2015 11:26:36 -0500
3 
-Subject: [PATCH 04/13] enable no blink by default
4 
-
5 
-Author:    Arjan van de Ven <arjan@linux.intel.com>
6 
- drivers/video/console/fbcon.c | 2 +-
7 
- 1 file changed, 1 insertion(+), 1 deletion(-)
8 
-
9 
-+++ linux-4.2/drivers/video/console/fbcon.c	2015-08-31 19:43:36.985319869 +0000
10 
-@@ -146,7 +146,7 @@
11 
-
12 
- static int fbcon_set_origin(struct vc_data *);
13 
-
14 
--static int fbcon_cursor_noblink;
15 
-+static int fbcon_cursor_noblink = 1;
16 
-
17 
- #define divides(a, b)	((!(a) || (b)%(a)) ? 0 : 1)
18 
-
SPECS/linux/03-poweroff.patch
History View file @ becc5c7
19 1 
new file mode 100644
... ... 
@@ -0,0 +1,24 @@
0 
+From 27f91aa3957467bfa18d62e893acee57c89ee4fc Mon Sep 17 00:00:00 2001
1 
+From: Alexey Makhalov <amakhalov@vmware.com>
2 
+Date: Tue, 29 Sep 2015 16:01:17 -0700
3 
+Subject: [PATCH] reboot.c: Hardcodded piix4 poweroff.
4 
+
5 
+---
6 
+ arch/x86/kernel/reboot.c | 1 +
7 
+ 1 file changed, 1 insertion(+)
8 
+
9 
+diff --git a/arch/x86/kernel/reboot.c b/arch/x86/kernel/reboot.c
10 
+index 86db4bc..259eafc 100644
11 
+--- a/arch/x86/kernel/reboot.c
12 
+@@ -653,6 +653,7 @@ static void native_machine_halt(void)
13 
+
14 
+ 	tboot_shutdown(TB_SHUTDOWN_HALT);
15 
+
16 
++	outw(0x2000, 0x1004);
17 
+ 	stop_this_cpu(NULL);
18 
+ }
19 
+
20 
+--
21 
+1.9.1
22 
+
SPECS/linux/04-quiet-boot.patch
History View file @ becc5c7
0 23 
new file mode 100644
... ... 
@@ -0,0 +1,26 @@
0 
+From 11a83da2120bf724d143df59c3ebce5fdec19a67 Mon Sep 17 00:00:00 2001
1 
+From: Alexey Makhalov <amakhalov@vmware.com>
2 
+Date: Tue, 29 Sep 2015 16:02:20 -0700
3 
+Subject: [PATCH] scsi/sd.c: Lower log level for "Assuming drive cache..."
4 
+ message.
5 
+
6 
+---
7 
+ drivers/scsi/sd.c | 2 +-
8 
+ 1 file changed, 1 insertion(+), 1 deletion(-)
9 
+
10 
+diff --git a/drivers/scsi/sd.c b/drivers/scsi/sd.c
11 
+index a20da8c..bbdc773 100644
12 
+--- a/drivers/scsi/sd.c
13 
+@@ -2483,7 +2483,7 @@ defaults:
14 
+ 				"Assuming drive cache: write back\n");
15 
+ 		sdkp->WCE = 1;
16 
+ 	} else {
17 
+-		sd_first_printk(KERN_ERR, sdkp,
18 
++		sd_first_printk(KERN_NOTICE, sdkp,
19 
+ 				"Assuming drive cache: write through\n");
20 
+ 		sdkp->WCE = 0;
21 
+ 	}
22 
+--
23 
+1.9.1
24 
+
SPECS/linux/04-vmstat-update-interval.patch
History View file @ becc5c7
0 25 
deleted file mode 100644
... ... 
@@ -1,22 +0,0 @@
1 
-From: Arjan van de Ven <arjan@linux.intel.com>
2 
-Date: Wed, 11 Feb 2015 16:47:20 -0600
3 
-Subject: [PATCH 05/13] wakeups
4 
-
5 
-Author:    Arjan van de Ven <arjan@linux.intel.com>
6 
-
7 
-Signed-off-by: Miguel Bernal Marin <miguel.bernal.marin@linux.intel.com>
8 
- mm/vmstat.c | 2 +-
9 
- 1 file changed, 1 insertion(+), 1 deletion(-)
10 
-
11 
-+++ linux-4.2/mm/vmstat.c	2015-08-31 19:43:41.031319749 +0000
12 
-@@ -1358,7 +1358,7 @@
13 
-
14 
- #ifdef CONFIG_SMP
15 
- static DEFINE_PER_CPU(struct delayed_work, vmstat_work);
16 
--int sysctl_stat_interval __read_mostly = HZ;
17 
-+int sysctl_stat_interval __read_mostly = 8 * HZ;
18 
- static cpumask_var_t cpu_stat_off;
19 
-
20 
- static void vmstat_update(struct work_struct *w)
SPECS/linux/05-pci-probe-vmware.patch
History View file @ becc5c7
21 1 
deleted file mode 100644
... ... 
@@ -1,359 +0,0 @@
1 
-Based on 0006-probe.patch and 0011-probe2.patch
2 
-by Arjan van de Ven <arjan@linux.intel.com>
3 
-
4 
-+++ linux-4.2/drivers/pci/probe.c	2015-09-02 06:31:48.427519962 +0000
5 
-@@ -159,6 +159,281 @@
6 
-
7 
- #define PCI_COMMAND_DECODE_ENABLE	(PCI_COMMAND_MEMORY | PCI_COMMAND_IO)
8 
-
9 
-+
10 
-+/* shortcut version of __pci_read_base where we know the sizes already */
11 
-+int __pci_read_base_shortcut(struct pci_dev *dev, enum pci_bar_type type,
12 
-+		    struct resource *res, unsigned int pos, u32 sz_in, u32 sz2_in)
13 
-+{
14 
-+	u32 l, sz;
15 
-+	u64 l64, sz64, mask64;
16 
-+	struct pci_bus_region region, inverted_region;
17 
-+
18 
-+	res->name = pci_name(dev);
19 
-+
20 
-+	pci_read_config_dword(dev, pos, &l);
21 
-+
22 
-+	sz = sz_in;
23 
-+
24 
-+	/*
25 
-+	 * All bits set in sz means the device isn't working properly.
26 
-+	 * If the BAR isn't implemented, all bits must be 0.  If it's a
27 
-+	 * memory BAR or a ROM, bit 0 must be clear; if it's an io BAR, bit
28 
-+	 * 1 must be clear.
29 
-+	 * Here we set the size and is not 0xffffffff
30 
-+	 */
31 
-+
32 
-+	/*
33 
-+	 * I don't know how l can have all bits set.  Copied from old code.
34 
-+	 * Maybe it fixes a bug on some ancient platform.
35 
-+	 */
36 
-+	if (l == 0xffffffff)
37 
-+		l = 0;
38 
-+
39 
-+	if (type == pci_bar_unknown) {
40 
-+		res->flags = decode_bar(dev, l);
41 
-+		res->flags |= IORESOURCE_SIZEALIGN;
42 
-+		if (res->flags & IORESOURCE_IO) {
43 
-+			l64 = l & PCI_BASE_ADDRESS_IO_MASK;
44 
-+			sz64 = sz & PCI_BASE_ADDRESS_IO_MASK;
45 
-+			mask64 = PCI_BASE_ADDRESS_IO_MASK & (u32)IO_SPACE_LIMIT;
46 
-+		} else {
47 
-+			l64 = l & PCI_BASE_ADDRESS_MEM_MASK;
48 
-+			sz64 = sz & PCI_BASE_ADDRESS_MEM_MASK;
49 
-+			mask64 = (u32)PCI_BASE_ADDRESS_MEM_MASK;
50 
-+		}
51 
-+	} else {
52 
-+		res->flags |= (l & IORESOURCE_ROM_ENABLE);
53 
-+		l64 = l & PCI_ROM_ADDRESS_MASK;
54 
-+		sz64 = sz & PCI_ROM_ADDRESS_MASK;
55 
-+		mask64 = (u32)PCI_ROM_ADDRESS_MASK;
56 
-+	}
57 
-+
58 
-+	if (res->flags & IORESOURCE_MEM_64) {
59 
-+		pci_read_config_dword(dev, pos + 4, &l);
60 
-+		sz = sz2_in;
61 
-+
62 
-+		l64 |= ((u64)l << 32);
63 
-+		sz64 |= ((u64)sz << 32);
64 
-+		mask64 |= ((u64)~0 << 32);
65 
-+	}
66 
-+
67 
-+	if (!sz64)
68 
-+		goto fail;
69 
-+
70 
-+	sz64 = pci_size(l64, sz64, mask64);
71 
-+	if (!sz64) {
72 
-+		dev_info(&dev->dev, FW_BUG "reg 0x%x: invalid BAR (can't size)\n",
73 
-+			 pos);
74 
-+		goto fail;
75 
-+	}
76 
-+
77 
-+	if (res->flags & IORESOURCE_MEM_64) {
78 
-+		if ((sizeof(dma_addr_t) < 8 || sizeof(resource_size_t) < 8) &&
79 
-+		    sz64 > 0x100000000ULL) {
80 
-+			res->flags |= IORESOURCE_UNSET | IORESOURCE_DISABLED;
81 
-+			res->start = 0;
82 
-+			res->end = 0;
83 
-+			dev_err(&dev->dev, "reg 0x%x: can't handle BAR larger than 4GB (size %#010llx)\n",
84 
-+				pos, (unsigned long long)sz64);
85 
-+			goto out;
86 
-+		}
87 
-+
88 
-+		if ((sizeof(dma_addr_t) < 8) && l) {
89 
-+			/* Above 32-bit boundary; try to reallocate */
90 
-+			res->flags |= IORESOURCE_UNSET;
91 
-+			res->start = 0;
92 
-+			res->end = sz64;
93 
-+			dev_info(&dev->dev, "reg 0x%x: can't handle BAR above 4GB (bus address %#010llx)\n",
94 
-+				 pos, (unsigned long long)l64);
95 
-+			goto out;
96 
-+		}
97 
-+	}
98 
-+
99 
-+	region.start = l64;
100 
-+	region.end = l64 + sz64;
101 
-+
102 
-+	pcibios_bus_to_resource(dev->bus, res, &region);
103 
-+	pcibios_resource_to_bus(dev->bus, &inverted_region, res);
104 
-+
105 
-+	/*
106 
-+	 * If "A" is a BAR value (a bus address), "bus_to_resource(A)" is
107 
-+	 * the corresponding resource address (the physical address used by
108 
-+	 * the CPU.  Converting that resource address back to a bus address
109 
-+	 * should yield the original BAR value:
110 
-+	 *
111 
-+	 *     resource_to_bus(bus_to_resource(A)) == A
112 
-+	 *
113 
-+	 * If it doesn't, CPU accesses to "bus_to_resource(A)" will not
114 
-+	 * be claimed by the device.
115 
-+	 */
116 
-+	if (inverted_region.start != region.start) {
117 
-+		res->flags |= IORESOURCE_UNSET;
118 
-+		res->start = 0;
119 
-+		res->end = region.end - region.start;
120 
-+		dev_info(&dev->dev, "reg 0x%x: initial BAR value %#010llx invalid\n",
121 
-+			 pos, (unsigned long long)region.start);
122 
-+	}
123 
-+
124 
-+	goto out;
125 
-+
126 
-+
127 
-+fail:
128 
-+	res->flags = 0;
129 
-+out:
130 
-+	if (res->flags)
131 
-+		dev_printk(KERN_DEBUG, &dev->dev, "reg 0x%x: %pR\n", pos, res);
132 
-+
133 
-+	return (res->flags & IORESOURCE_MEM_64) ? 1 : 0;
134 
-+}
135 
-+
136 
-+static int is_known_device(struct pci_dev *dev, int pos, int *sz)
137 
-+{
138 
-+	switch (dev->vendor) {
139 
-+		/* Intel Corporation */
140 
-+		case 0x8086:
141 
-+		switch (dev->device) {
142 
-+			/* IDE interface: 82371AB/EB/MB PIIX4 IDE */
143 
-+			case 0x7111:
144 
-+			switch (pos) {
145 
-+				case 0x20:
146 
-+					*sz = 0xfffffff1;
147 
-+					return 1;
148 
-+				case 0x10:
149 
-+				case 0x14:
150 
-+				case 0x18:
151 
-+				case 0x1c:
152 
-+				case 0x24:
153 
-+				case 0x30:
154 
-+					*sz = 0; /* Not implemented */
155 
-+					return 1;
156 
-+			}
157 
-+			break;
158 
-+
159 
-+			/* Bridge: 82371AB/EB/MB PIIX4 ACPI */
160 
-+			case 0x7113:
161 
-+			switch (pos) {
162 
-+				case 0x10:
163 
-+				case 0x14:
164 
-+				case 0x18:
165 
-+				case 0x1c:
166 
-+				case 0x20:
167 
-+				case 0x24:
168 
-+				case 0x30:
169 
-+					*sz = 0; /* Not implemented */
170 
-+					return 1;
171 
-+			}
172 
-+			break;
173 
-+		}
174 
-+		break;
175 
-+
176 
-+		/* VMware, Inc */
177 
-+		case 0x15ad:
178 
-+		switch (dev->device) {
179 
-+			/* VMware SVGA II Adapter */
180 
-+        		case 0x0405:
181 
-+			switch (pos) {
182 
-+				case 0x10:
183 
-+					*sz = 0xfffffff1;
184 
-+                        		return 1;
185 
-+				case 0x14:
186 
-+					*sz = 0xfc000000;
187 
-+					return 1;
188 
-+				case 0x18:
189 
-+					*sz = 0xff800000;
190 
-+					return 1;
191 
-+				case 0x1c:
192 
-+				case 0x20:
193 
-+				case 0x24:
194 
-+					*sz = 0; /* Not implemented */
195 
-+					return 1;
196 
-+				case 0x30:
197 
-+					*sz = 0xffff8000;
198 
-+					return 1;
199 
-+			}
200 
-+			break;
201 
-+
202 
-+			/* VMware Virtual Machine Communication Interface */
203 
-+        		case 0x0740:
204 
-+			switch (pos) {
205 
-+				case 0x10:
206 
-+					*sz = 0xffffffc1;
207 
-+					return 1;
208 
-+				case 0x14:
209 
-+					*sz = 0xffffe000;
210 
-+					return 1;
211 
-+				case 0x1c:
212 
-+				case 0x20:
213 
-+				case 0x24:
214 
-+				case 0x30:
215 
-+					*sz = 0; /* Not implemented */
216 
-+					return 1;
217 
-+			}
218 
-+			break;
219 
-+
220 
-+			/* VMware PCI bridge */
221 
-+			case 0x0790:
222 
-+			/* VMware PCI Express Root Port */
223 
-+			case 0x07a0:
224 
-+			switch (pos) {
225 
-+				case 0x10:
226 
-+				case 0x14:
227 
-+				case 0x38:
228 
-+					*sz = 0; /* Not implemented */
229 
-+					return 1;
230 
-+			}
231 
-+			break;
232 
-+
233 
-+			/* VMware VMXNET3 Ethernet Controller */
234 
-+			case 0x07b0:
235 
-+			switch (pos) {
236 
-+				case 0x10:
237 
-+					*sz = 0xfffff000;
238 
-+					return 1;
239 
-+				case 0x14:
240 
-+					*sz = 0xfffff000;
241 
-+					return 1;
242 
-+				case 0x18:
243 
-+					*sz = 0xffffe000;
244 
-+					return 1;
245 
-+				case 0x1c:
246 
-+					*sz = 0xfffffff1;
247 
-+					return 1;
248 
-+				case 0x20:
249 
-+				case 0x24:
250 
-+					*sz = 0; /* Not implemented */
251 
-+					return 1;
252 
-+				case 0x30:
253 
-+					*sz = 0xffff0000;
254 
-+					return 1;
255 
-+			}
256 
-+			break;
257 
-+
258 
-+			/* VMware PVSCSI SCSI Controller */
259 
-+        		case 0x07c0:
260 
-+			switch (pos) {
261 
-+				case 0x10:
262 
-+					*sz = 0xfffffff9;
263 
-+					return 1;
264 
-+				case 0x14:
265 
-+					*sz = 0xffff8000;
266 
-+					return 1;
267 
-+				case 0x1c:
268 
-+				case 0x20:
269 
-+				case 0x24:
270 
-+					*sz = 0; /* Not implemented */
271 
-+					return 1;
272 
-+				case 0x30:
273 
-+					*sz = 0xffff0000;
274 
-+					return 1;
275 
-+			}
276 
-+			break;
277 
-+		}
278 
-+		break;
279 
-+
280 
-+	}
281 
-+        return 0;
282 
-+}
283 
-+
284 
- /**
285 
-  * pci_read_base - read a PCI BAR
286 
-  * @dev: the PCI device
287 
-@@ -178,6 +453,13 @@
288 
-
289 
- 	mask = type ? PCI_ROM_ADDRESS_MASK : ~0;
290 
-
291 
-+	if (is_known_device(dev, pos, &sz))
292 
-+		return __pci_read_base_shortcut(dev, type, res, pos, sz, 0);
293 
-+
294 
-+	res->name = pci_name(dev);
295 
-+
296 
-+	printk("Starting probe for %s %x:%x:%x\n", res->name, dev->vendor, dev->device, pos);
297 
-+
298 
- 	/* No printks while decoding is disabled! */
299 
- 	if (!dev->mmio_always_on) {
300 
- 		pci_read_config_word(dev, PCI_COMMAND, &orig_cmd);
301 
-@@ -187,7 +469,6 @@
302 
- 		}
303 
- 	}
304 
-
305 
--	res->name = pci_name(dev);
306 
-
307 
- 	pci_read_config_dword(dev, pos, &l);
308 
- 	pci_write_config_dword(dev, pos, l | mask);
309 
-@@ -1108,6 +1389,28 @@
310 
-
311 
- #define LEGACY_IO_RESOURCE	(IORESOURCE_IO | IORESOURCE_PCI_FIXED)
312 
-
313 
-+static int guess_bar_count(int class)
314 
-+{
315 
-+        if (class == 0x068000)
316 
-+            return 0;
317 
-+        if (class == 0x020000)
318 
-+            return 3;
319 
-+        if (class == 0x010000)
320 
-+            return 2;
321 
-+        if (class == 0x00ff00)
322 
-+            return 1;
323 
-+        return 6;
324 
-+}
325 
-+
326 
-+static int has_rom(int class, int rom)
327 
-+{
328 
-+        if (class == 0x020000)
329 
-+          return 0;
330 
-+        if (class == 0x010000 || class == 0x00ff00)
331 
-+          return 0;
332 
-+        return rom;
333 
-+}
334 
-+
335 
- void pci_msi_setup_pci_dev(struct pci_dev *dev)
336 
- {
337 
- 	/*
338 
-@@ -1142,6 +1445,7 @@
339 
- 	int pos = 0;
340 
- 	struct pci_bus_region region;
341 
- 	struct resource *res;
342 
-+	int maxbar;
343 
-
344 
- 	if (pci_read_config_byte(dev, PCI_HEADER_TYPE, &hdr_type))
345 
- 		return -EIO;
346 
-@@ -1191,7 +1495,11 @@
347 
- 		if (class == PCI_CLASS_BRIDGE_PCI)
348 
- 			goto bad;
349 
- 		pci_read_irq(dev);
350 
--		pci_read_bases(dev, 6, PCI_ROM_ADDRESS);
351 
-+
352 
-+		maxbar = guess_bar_count(dev->class);
353 
-+
354 
-+		if (class != PCI_CLASS_STORAGE_IDE)
355 
-+			pci_read_bases(dev, maxbar, has_rom(dev->class, PCI_ROM_ADDRESS));
356 
- 		pci_read_config_word(dev, PCI_SUBSYSTEM_VENDOR_ID, &dev->subsystem_vendor);
357 
- 		pci_read_config_word(dev, PCI_SUBSYSTEM_ID, &dev->subsystem_device);
358 
-
SPECS/linux/05-pv-ops.patch
History View file @ becc5c7
359 1 
new file mode 100644
... ... 
@@ -0,0 +1,731 @@
0 
+From d5e7229bec41406a4040a1ac9131e24cb1f8768d Mon Sep 17 00:00:00 2001
1 
+From: Alexey Makhalov <amakhalov@vmware.com>
2 
+Date: Wed, 30 Sep 2015 23:00:00 +0000
3 
+Subject: [PATCH 1/5] Measure correct boot time.
4 
+
5 
+---
6 
+ arch/x86/Kconfig          |  8 ++++++++
7 
+ arch/x86/kernel/head_64.S | 16 ++++++++++++++++
8 
+ init/main.c               | 11 +++++++++++
9 
+ 3 files changed, 35 insertions(+)
10 
+
11 
+diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
12 
+index b3a1a5d..24141ac 100644
13 
+--- a/arch/x86/Kconfig
14 
+@@ -708,6 +708,14 @@ config KVM_DEBUG_FS
15 
+ 	  Statistics are displayed in debugfs filesystem. Enabling this option
16 
+ 	  may incur significant overhead.
17 
+
18 
++config VMWARE
19 
++	bool "VMware Guest support"
20 
++	depends on PARAVIRT
21 
++	default y
22 
++	---help---
23 
++	  This option enables various optimizations for running under the
24 
++	  VMware hypervisor. It includes a correct boot time measurement.
25 
++
26 
+ source "arch/x86/lguest/Kconfig"
27 
+
28 
+ config PARAVIRT_TIME_ACCOUNTING
29 
+diff --git a/arch/x86/kernel/head_64.S b/arch/x86/kernel/head_64.S
30 
+index 1d40ca8..eccf2d7 100644
31 
+--- a/arch/x86/kernel/head_64.S
32 
+@@ -65,6 +65,16 @@ startup_64:
33 
+ 	 * tables and then reload them.
34 
+ 	 */
35 
+
36 
++#ifdef CONFIG_VMWARE
37 
++	/*
38 
++	 * Read a TSC value first
39 
++	 */
40 
++	rdtsc
41 
++	shl	$0x20, %rdx
42 
++	or	%rax, %rdx
43 
++	mov	%rdx, tsc_at_head(%rip)
44 
++#endif
45 
++
46 
+ 	/*
47 
+ 	 * Compute the delta between the address I am compiled to run at and the
48 
+ 	 * address I am actually running at.
49 
+@@ -512,6 +522,12 @@ early_gdt_descr:
50 
+ early_gdt_descr_base:
51 
+ 	.quad	INIT_PER_CPU_VAR(gdt_page)
52 
+
53 
++#ifdef CONFIG_VMWARE
54 
++	.globl tsc_at_head
55 
++tsc_at_head:
56 
++	.quad 0
57 
++#endif
58 
++
59 
+ ENTRY(phys_base)
60 
+ 	/* This must match the first entry in level2_kernel_pgt */
61 
+ 	.quad   0x0000000000000000
62 
+diff --git a/init/main.c b/init/main.c
63 
+index 5650655..c386186 100644
64 
+--- a/init/main.c
65 
+@@ -929,6 +929,9 @@ static int try_to_run_init_process(const char *init_filename)
66 
+ }
67 
+
68 
+ static noinline void __init kernel_init_freeable(void);
69 
++#ifdef CONFIG_VMWARE
70 
++extern unsigned long long tsc_at_head;
71 
++#endif
72 
+
73 
+ static int __ref kernel_init(void *unused)
74 
+ {
75 
+@@ -944,6 +947,14 @@ static int __ref kernel_init(void *unused)
76 
+
77 
+ 	flush_delayed_fput();
78 
+
79 
++#ifdef CONFIG_VMWARE
80 
++	printk(KERN_INFO "Pre-Kernel time: %5dms\n",
81 
++		(unsigned int) (tsc_at_head / tsc_khz));
82 
++	printk(KERN_INFO "Kernel boot time:%5dms\n",
83 
++		(unsigned int) ((__native_read_tsc() - tsc_at_head) /
84 
++			tsc_khz));
85 
++#endif
86 
++
87 
+ 	if (ramdisk_execute_command) {
88 
+ 		ret = run_init_process(ramdisk_execute_command);
89 
+ 		if (!ret)
90 
+--
91 
+1.9.1
92 
+
93 
+
94 
+From 500436e32d4dffae5d78f12be72c2e6784ab8cfb Mon Sep 17 00:00:00 2001
95 
+From: Alexey Makhalov <amakhalov@vmware.com>
96 
+Date: Fri, 2 Oct 2015 20:00:06 +0000
97 
+Subject: [PATCH 2/5] PV io_delay for VMware guest.
98 
+
99 
+---
100 
+ arch/x86/kernel/cpu/vmware.c | 13 +++++++++++++
101 
+ 1 file changed, 13 insertions(+)
102 
+
103 
+diff --git a/arch/x86/kernel/cpu/vmware.c b/arch/x86/kernel/cpu/vmware.c
104 
+index 628a059..8fdd031 100644
105 
+--- a/arch/x86/kernel/cpu/vmware.c
106 
+@@ -26,6 +26,7 @@
107 
+ #include <asm/div64.h>
108 
+ #include <asm/x86_init.h>
109 
+ #include <asm/hypervisor.h>
110 
++#include <asm/timer.h>
111 
+
112 
+ #define CPUID_VMWARE_INFO_LEAF	0x40000000
113 
+ #define VMWARE_HYPERVISOR_MAGIC	0x564D5868
114 
+@@ -75,6 +76,16 @@ static unsigned long vmware_get_tsc_khz(void)
115 
+ 	return tsc_hz;
116 
+ }
117 
+
118 
++static void __init paravirt_ops_setup(void)
119 
++{
120 
++	pv_info.name = "VMware";
121 
++	pv_cpu_ops.io_delay = paravirt_nop,
122 
++
123 
++#ifdef CONFIG_X86_IO_APIC
124 
++	no_timer_check = 1;
125 
++#endif
126 
++}
127 
++
128 
+ static void __init vmware_platform_setup(void)
129 
+ {
130 
+ 	uint32_t eax, ebx, ecx, edx;
131 
+@@ -86,6 +97,8 @@ static void __init vmware_platform_setup(void)
132 
+ 	else
133 
+ 		printk(KERN_WARNING
134 
+ 		       "Failed to get TSC freq from the hypervisor\n");
135 
++
136 
++	paravirt_ops_setup();
137 
+ }
138 
+
139 
+ /*
140 
+--
141 
+1.9.1
142 
+
143 
+
144 
+From adff5db39b45d8adef2b4579ec46ab1bb721a81f Mon Sep 17 00:00:00 2001
145 
+From: Alexey Makhalov <amakhalov@vmware.com>
146 
+Date: Wed, 7 Oct 2015 22:53:18 +0000
147 
+Subject: [PATCH 3/5] Improved tsc based sched_clock & clocksource.
148 
+
149 
+---
150 
+ arch/x86/Kconfig             |  1 +
151 
+ arch/x86/kernel/cpu/vmware.c | 66 ++++++++++++++++++++++++++++++++++++++++++++
152 
+ init/main.c                  | 11 --------
153 
+ kernel/sched/clock.c         |  2 ++
154 
+ 4 files changed, 69 insertions(+), 11 deletions(-)
155 
+
156 
+diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
157 
+index 24141ac..ca0be27 100644
158 
+--- a/arch/x86/Kconfig
159 
+@@ -711,6 +711,7 @@ config KVM_DEBUG_FS
160 
+ config VMWARE
161 
+ 	bool "VMware Guest support"
162 
+ 	depends on PARAVIRT
163 
++	select PARAVIRT_CLOCK
164 
+ 	default y
165 
+ 	---help---
166 
+ 	  This option enables various optimizations for running under the
167 
+diff --git a/arch/x86/kernel/cpu/vmware.c b/arch/x86/kernel/cpu/vmware.c
168 
+index 8fdd031..004825e 100644
169 
+--- a/arch/x86/kernel/cpu/vmware.c
170 
+@@ -27,6 +27,7 @@
171 
+ #include <asm/x86_init.h>
172 
+ #include <asm/hypervisor.h>
173 
+ #include <asm/timer.h>
174 
++#include <linux/sched.h>
175 
+
176 
+ #define CPUID_VMWARE_INFO_LEAF	0x40000000
177 
+ #define VMWARE_HYPERVISOR_MAGIC	0x564D5868
178 
+@@ -76,10 +77,43 @@ static unsigned long vmware_get_tsc_khz(void)
179 
+ 	return tsc_hz;
180 
+ }
181 
+
182 
++static struct cyc2ns_data vmware_cyc2ns;
183 
++extern unsigned long long tsc_at_head;
184 
++static cycle_t vmware_clock_get_cycles(struct clocksource *cs)
185 
++{
186 
++	return __native_read_tsc();
187 
++}
188 
++
189 
++static struct clocksource clocksource_vmware = {
190 
++	.name = "vmware-clock",
191 
++	.read = vmware_clock_get_cycles,
192 
++	.rating = 400,
193 
++	.mask = CLOCKSOURCE_MASK(64),
194 
++	.flags = CLOCK_SOURCE_IS_CONTINUOUS,
195 
++};
196 
++
197 
++struct clocksource * __init clocksource_default_clock(void)
198 
++{
199 
++	return &clocksource_vmware;
200 
++}
201 
++
202 
++#define CYC2NS_SCALE_FACTOR 8
203 
++
204 
++static u64 vmware_sched_clock(void)
205 
++{
206 
++	u64 ret;
207 
++
208 
++	ret = __native_read_tsc() - vmware_cyc2ns.cyc2ns_offset;
209 
++	ret = mul_u64_u32_shr(ret, vmware_cyc2ns.cyc2ns_mul, CYC2NS_SCALE_FACTOR);
210 
++	return ret;
211 
++}
212 
++
213 
++extern __read_mostly int sched_clock_running;
214 
+ static void __init paravirt_ops_setup(void)
215 
+ {
216 
+ 	pv_info.name = "VMware";
217 
+ 	pv_cpu_ops.io_delay = paravirt_nop,
218 
++	pv_time_ops.sched_clock = vmware_sched_clock;
219 
+
220 
+ #ifdef CONFIG_X86_IO_APIC
221 
+ 	no_timer_check = 1;
222 
+@@ -88,6 +122,7 @@ static void __init paravirt_ops_setup(void)
223 
+
224 
+ static void __init vmware_platform_setup(void)
225 
+ {
226 
++	uint64_t cpu_khz;
227 
+ 	uint32_t eax, ebx, ecx, edx;
228 
+
229 
+ 	VMWARE_PORT(GETHZ, eax, ebx, ecx, edx);
230 
+@@ -98,6 +133,19 @@ static void __init vmware_platform_setup(void)
231 
+ 		printk(KERN_WARNING
232 
+ 		       "Failed to get TSC freq from the hypervisor\n");
233 
+
234 
++	cpu_khz = eax | (((uint64_t)ebx) << 32);
235 
++	do_div(cpu_khz, 1000);
236 
++	printk(KERN_INFO "Pre Kernel boot time: %dms\n",
237 
++		(unsigned int) (tsc_at_head / cpu_khz));
238 
++
239 
++	vmware_cyc2ns.cyc2ns_mul =
240 
++		DIV_ROUND_CLOSEST(NSEC_PER_MSEC << CYC2NS_SCALE_FACTOR,
241 
++				  cpu_khz);
242 
++	vmware_cyc2ns.cyc2ns_shift = CYC2NS_SCALE_FACTOR;
243 
++	vmware_cyc2ns.cyc2ns_offset = tsc_at_head;
244 
++
245 
++	clocksource_register_khz(&clocksource_vmware, cpu_khz);
246 
++
247 
+ 	paravirt_ops_setup();
248 
+ }
249 
+
250 
+@@ -158,3 +206,21 @@ const __refconst struct hypervisor_x86 x86_hyper_vmware = {
251 
+ 	.x2apic_available	= vmware_legacy_x2apic_available,
252 
+ };
253 
+ EXPORT_SYMBOL(x86_hyper_vmware);
254 
++
255 
++void read_boot_clock64(struct timespec64 *ts)
256 
++{
257 
++	struct timespec64 now;
258 
++	u64 delta, delta_nsec;
259 
++	u32 rem;
260 
++
261 
++	read_persistent_clock64(&now);
262 
++	delta = __native_read_tsc() - vmware_cyc2ns.cyc2ns_offset;
263 
++	delta_nsec = mul_u64_u32_shr(delta, vmware_cyc2ns.cyc2ns_mul,
264 
++					CYC2NS_SCALE_FACTOR);
265 
++	ts->tv_sec = now.tv_sec - div_s64_rem(delta_nsec, NSEC_PER_SEC, &rem);
266 
++	ts->tv_nsec = now.tv_nsec - rem;
267 
++	while (unlikely(ts->tv_nsec < 0)) {
268 
++		ts->tv_sec--;
269 
++		ts->tv_nsec += NSEC_PER_SEC;
270 
++	}
271 
++}
272 
+diff --git a/init/main.c b/init/main.c
273 
+index c386186..5650655 100644
274 
+--- a/init/main.c
275 
+@@ -929,9 +929,6 @@ static int try_to_run_init_process(const char *init_filename)
276 
+ }
277 
+
278 
+ static noinline void __init kernel_init_freeable(void);
279 
+-#ifdef CONFIG_VMWARE
280 
+-extern unsigned long long tsc_at_head;
281 
+-#endif
282 
+
283 
+ static int __ref kernel_init(void *unused)
284 
+ {
285 
+@@ -947,14 +944,6 @@ static int __ref kernel_init(void *unused)
286 
+
287 
+ 	flush_delayed_fput();
288 
+
289 
+-#ifdef CONFIG_VMWARE
290 
+-	printk(KERN_INFO "Pre-Kernel time: %5dms\n",
291 
+-		(unsigned int) (tsc_at_head / tsc_khz));
292 
+-	printk(KERN_INFO "Kernel boot time:%5dms\n",
293 
+-		(unsigned int) ((__native_read_tsc() - tsc_at_head) /
294 
+-			tsc_khz));
295 
+-#endif
296 
+-
297 
+ 	if (ramdisk_execute_command) {
298 
+ 		ret = run_init_process(ramdisk_execute_command);
299 
+ 		if (!ret)
300 
+diff --git a/kernel/sched/clock.c b/kernel/sched/clock.c
301 
+index c0a2051..284a7ba 100644
302 
+--- a/kernel/sched/clock.c
303 
+@@ -385,8 +385,10 @@ u64 cpu_clock(int cpu)
304 
+  */
305 
+ u64 local_clock(void)
306 
+ {
307 
++#ifndef CONFIG_VMWARE
308 
+ 	if (!sched_clock_stable())
309 
+ 		return sched_clock_cpu(raw_smp_processor_id());
310 
++#endif
311 
+
312 
+ 	return sched_clock();
313 
+ }
314 
+--
315 
+1.9.1
316 
+
317 
+
318 
+From 3bd5760c3b1f6cb39568361561d7d1e5440f1109 Mon Sep 17 00:00:00 2001
319 
+From: Alexey Makhalov <amakhalov@vmware.com>
320 
+Date: Mon, 12 Oct 2015 22:43:38 +0000
321 
+Subject: [PATCH 4/5] Move read_boot_clock64 into pv_time_ops.
322 
+
323 
+---
324 
+ arch/x86/Kconfig                      | 14 ++++++--
325 
+ arch/x86/include/asm/paravirt.h       |  5 +++
326 
+ arch/x86/include/asm/paravirt_types.h |  5 +++
327 
+ arch/x86/kernel/cpu/vmware.c          | 66 ++++++++++++++++++++---------------
328 
+ arch/x86/kernel/head_64.S             |  8 +----
329 
+ arch/x86/kernel/paravirt.c            |  7 ++++
330 
+ arch/x86/kernel/setup.c               |  9 +++++
331 
+ kernel/sched/clock.c                  |  7 +++-
332 
+ 8 files changed, 83 insertions(+), 38 deletions(-)
333 
+
334 
+diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
335 
+index ca0be27..d3ef8ef 100644
336 
+--- a/arch/x86/Kconfig
337 
+@@ -709,13 +709,23 @@ config KVM_DEBUG_FS
338 
+ 	  may incur significant overhead.
339 
+
340 
+ config VMWARE
341 
+-	bool "VMware Guest support"
342 
++	bool "VMware guest support"
343 
+ 	depends on PARAVIRT
344 
+ 	select PARAVIRT_CLOCK
345 
+ 	default y
346 
+ 	---help---
347 
+ 	  This option enables various optimizations for running under the
348 
+-	  VMware hypervisor. It includes a correct boot time measurement.
349 
++	  VMware hypervisor. It includes vmware-clock clocksource and some
350 
++	  pv-ops implementations.
351 
++
352 
++config VMWARE_ONLY
353 
++	bool "Build for VMware only"
354 
++	depends on VMWARE
355 
++	default n
356 
++	---help---
357 
++	  This option enables VMware guest specific optimizations. If you say
358 
++	  yes here, the kernel will probably work only under VMware hypervisor.
359 
++
360 
+
361 
+ source "arch/x86/lguest/Kconfig"
362 
+
363 
+diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravirt.h
364 
+index d143bfa..ffcbd18 100644
365 
+--- a/arch/x86/include/asm/paravirt.h
366 
+@@ -201,6 +201,11 @@ static inline u64 paravirt_steal_clock(int cpu)
367 
+ 	return PVOP_CALL1(u64, pv_time_ops.steal_clock, cpu);
368 
+ }
369 
+
370 
++static inline void paravirt_read_boot_clock64(struct timespec64 *ts)
371 
++{
372 
++	PVOP_VCALL1(pv_time_ops.read_boot_clock64, ts);
373 
++}
374 
++
375 
+ static inline unsigned long long paravirt_read_pmc(int counter)
376 
+ {
377 
+ 	return PVOP_CALL1(u64, pv_cpu_ops.read_pmc, counter);
378 
+diff --git a/arch/x86/include/asm/paravirt_types.h b/arch/x86/include/asm/paravirt_types.h
379 
+index a6b8f9f..7adcd55 100644
380 
+--- a/arch/x86/include/asm/paravirt_types.h
381 
+@@ -51,6 +51,10 @@ struct mm_struct;
382 
+ struct desc_struct;
383 
+ struct task_struct;
384 
+ struct cpumask;
385 
++#if __BITS_PER_LONG == 64
386 
++# define timespec64 timespec
387 
++#endif
388 
++struct timespec64;
389 
+
390 
+ /*
391 
+  * Wrapper type for pointers to code which uses the non-standard
392 
+@@ -98,6 +102,7 @@ struct pv_time_ops {
393 
+ 	unsigned long long (*sched_clock)(void);
394 
+ 	unsigned long long (*steal_clock)(int cpu);
395 
+ 	unsigned long (*get_tsc_khz)(void);
396 
++	void (*read_boot_clock64)(struct timespec64 *ts);
397 
+ };
398 
+
399 
+ struct pv_cpu_ops {
400 
+diff --git a/arch/x86/kernel/cpu/vmware.c b/arch/x86/kernel/cpu/vmware.c
401 
+index 004825e..1bf1fe3 100644
402 
+--- a/arch/x86/kernel/cpu/vmware.c
403 
+@@ -77,8 +77,10 @@ static unsigned long vmware_get_tsc_khz(void)
404 
+ 	return tsc_hz;
405 
+ }
406 
+
407 
++#define CYC2NS_SCALE_FACTOR 8
408 
+ static struct cyc2ns_data vmware_cyc2ns;
409 
+-extern unsigned long long tsc_at_head;
410 
++u64 __initdata tsc_at_head;
411 
++
412 
+ static cycle_t vmware_clock_get_cycles(struct clocksource *cs)
413 
+ {
414 
+ 	return __native_read_tsc();
415 
+@@ -92,12 +94,14 @@ static struct clocksource clocksource_vmware = {
416 
+ 	.flags = CLOCK_SOURCE_IS_CONTINUOUS,
417 
+ };
418 
+
419 
++#ifdef CONFIG_VMWARE_ONLY
420 
++/* We want to use clocksource_vmware from the beginning to avoid drifting in
421 
++   monotonic clock */
422 
+ struct clocksource * __init clocksource_default_clock(void)
423 
+ {
424 
+ 	return &clocksource_vmware;
425 
+ }
426 
+-
427 
+-#define CYC2NS_SCALE_FACTOR 8
428 
++#endif
429 
+
430 
+ static u64 vmware_sched_clock(void)
431 
+ {
432 
+@@ -108,12 +112,33 @@ static u64 vmware_sched_clock(void)
433 
+ 	return ret;
434 
+ }
435 
+
436 
+-extern __read_mostly int sched_clock_running;
437 
++
438 
++/* Function to read the exact time the system has been started. It will be
439 
++   used as zero time for monotonic clock */
440 
++static void vmware_read_boot_clock64(struct timespec64 *ts)
441 
++{
442 
++	struct timespec64 now;
443 
++	u64 delta, delta_nsec;
444 
++	u32 rem;
445 
++
446 
++	read_persistent_clock64(&now);
447 
++	delta = __native_read_tsc() - vmware_cyc2ns.cyc2ns_offset;
448 
++	delta_nsec = mul_u64_u32_shr(delta, vmware_cyc2ns.cyc2ns_mul,
449 
++					CYC2NS_SCALE_FACTOR);
450 
++	ts->tv_sec = now.tv_sec - div_s64_rem(delta_nsec, NSEC_PER_SEC, &rem);
451 
++	ts->tv_nsec = now.tv_nsec - rem;
452 
++	while (unlikely(ts->tv_nsec < 0)) {
453 
++		ts->tv_sec--;
454 
++		ts->tv_nsec += NSEC_PER_SEC;
455 
++	}
456 
++}
457 
++
458 
+ static void __init paravirt_ops_setup(void)
459 
+ {
460 
+ 	pv_info.name = "VMware";
461 
+ 	pv_cpu_ops.io_delay = paravirt_nop,
462 
+ 	pv_time_ops.sched_clock = vmware_sched_clock;
463 
++	pv_time_ops.read_boot_clock64 = vmware_read_boot_clock64;
464 
+
465 
+ #ifdef CONFIG_X86_IO_APIC
466 
+ 	no_timer_check = 1;
467 
+@@ -122,7 +147,7 @@ static void __init paravirt_ops_setup(void)
468 
+
469 
+ static void __init vmware_platform_setup(void)
470 
+ {
471 
+-	uint64_t cpu_khz;
472 
++	uint64_t vtsc_khz;
473 
+ 	uint32_t eax, ebx, ecx, edx;
474 
+
475 
+ 	VMWARE_PORT(GETHZ, eax, ebx, ecx, edx);
476 
+@@ -133,18 +158,18 @@ static void __init vmware_platform_setup(void)
477 
+ 		printk(KERN_WARNING
478 
+ 		       "Failed to get TSC freq from the hypervisor\n");
479 
+
480 
+-	cpu_khz = eax | (((uint64_t)ebx) << 32);
481 
+-	do_div(cpu_khz, 1000);
482 
++	vtsc_khz = eax | (((uint64_t)ebx) << 32);
483 
++	do_div(vtsc_khz, 1000);
484 
+ 	printk(KERN_INFO "Pre Kernel boot time: %dms\n",
485 
+-		(unsigned int) (tsc_at_head / cpu_khz));
486 
++		(unsigned int) (tsc_at_head / vtsc_khz));
487 
+
488 
+ 	vmware_cyc2ns.cyc2ns_mul =
489 
+ 		DIV_ROUND_CLOSEST(NSEC_PER_MSEC << CYC2NS_SCALE_FACTOR,
490 
+-				  cpu_khz);
491 
++				  vtsc_khz);
492 
+ 	vmware_cyc2ns.cyc2ns_shift = CYC2NS_SCALE_FACTOR;
493 
+ 	vmware_cyc2ns.cyc2ns_offset = tsc_at_head;
494 
+
495 
+-	clocksource_register_khz(&clocksource_vmware, cpu_khz);
496 
++	clocksource_register_khz(&clocksource_vmware, vtsc_khz);
497 
+
498 
+ 	paravirt_ops_setup();
499 
+ }
500 
+@@ -156,6 +181,9 @@ static void __init vmware_platform_setup(void)
501 
+  */
502 
+ static uint32_t __init vmware_platform(void)
503 
+ {
504 
++#ifndef CONFIG_VMWARE_ONLY
505 
++	tsc_at_head = __native_read_tsc();
506 
++#endif
507 
+ 	if (cpu_has_hypervisor) {
508 
+ 		unsigned int eax;
509 
+ 		unsigned int hyper_vendor_id[3];
510 
+@@ -206,21 +234,3 @@ const __refconst struct hypervisor_x86 x86_hyper_vmware = {
511 
+ 	.x2apic_available	= vmware_legacy_x2apic_available,
512 
+ };
513 
+ EXPORT_SYMBOL(x86_hyper_vmware);
514 
+-
515 
+-void read_boot_clock64(struct timespec64 *ts)
516 
+-{
517 
+-	struct timespec64 now;
518 
+-	u64 delta, delta_nsec;
519 
+-	u32 rem;
520 
+-
521 
+-	read_persistent_clock64(&now);
522 
+-	delta = __native_read_tsc() - vmware_cyc2ns.cyc2ns_offset;
523 
+-	delta_nsec = mul_u64_u32_shr(delta, vmware_cyc2ns.cyc2ns_mul,
524 
+-					CYC2NS_SCALE_FACTOR);
525 
+-	ts->tv_sec = now.tv_sec - div_s64_rem(delta_nsec, NSEC_PER_SEC, &rem);
526 
+-	ts->tv_nsec = now.tv_nsec - rem;
527 
+-	while (unlikely(ts->tv_nsec < 0)) {
528 
+-		ts->tv_sec--;
529 
+-		ts->tv_nsec += NSEC_PER_SEC;
530 
+-	}
531 
+-}
532 
+diff --git a/arch/x86/kernel/head_64.S b/arch/x86/kernel/head_64.S
533 
+index eccf2d7..1dfd805 100644
534 
+--- a/arch/x86/kernel/head_64.S
535 
+@@ -65,7 +65,7 @@ startup_64:
536 
+ 	 * tables and then reload them.
537 
+ 	 */
538 
+
539 
+-#ifdef CONFIG_VMWARE
540 
++#ifdef CONFIG_VMWARE_ONLY
541 
+ 	/*
542 
+ 	 * Read a TSC value first
543 
+ 	 */
544 
+@@ -522,12 +522,6 @@ early_gdt_descr:
545 
+ early_gdt_descr_base:
546 
+ 	.quad	INIT_PER_CPU_VAR(gdt_page)
547 
+
548 
+-#ifdef CONFIG_VMWARE
549 
+-	.globl tsc_at_head
550 
+-tsc_at_head:
551 
+-	.quad 0
552 
+-#endif
553 
+-
554 
+ ENTRY(phys_base)
555 
+ 	/* This must match the first entry in level2_kernel_pgt */
556 
+ 	.quad   0x0000000000000000
557 
+diff --git a/arch/x86/kernel/paravirt.c b/arch/x86/kernel/paravirt.c
558 
+index 58bcfb6..abf40ec 100644
559 
+--- a/arch/x86/kernel/paravirt.c
560 
+@@ -210,6 +210,12 @@ static u64 native_steal_clock(int cpu)
561 
+ 	return 0;
562 
+ }
563 
+
564 
++static void native_read_boot_clock64(struct timespec64 *ts)
565 
++{
566 
++	ts->tv_sec = 0;
567 
++	ts->tv_nsec = 0;
568 
++}
569 
++
570 
+ /* These are in entry.S */
571 
+ extern void native_iret(void);
572 
+ extern void native_irq_enable_sysexit(void);
573 
+@@ -320,6 +326,7 @@ struct pv_init_ops pv_init_ops = {
574 
+ struct pv_time_ops pv_time_ops = {
575 
+ 	.sched_clock = native_sched_clock,
576 
+ 	.steal_clock = native_steal_clock,
577 
++	.read_boot_clock64 = native_read_boot_clock64,
578 
+ };
579 
+
580 
+ __visible struct pv_irq_ops pv_irq_ops = {
581 
+diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
582 
+index 80f874b..0d7022e 100644
583 
+--- a/arch/x86/kernel/setup.c
584 
+@@ -1289,3 +1289,12 @@ static int __init register_kernel_offset_dumper(void)
585 
+ 	return 0;
586 
+ }
587 
+ __initcall(register_kernel_offset_dumper);
588 
++
589 
++/* We need to define a real function for read_boot_clock64, to override the
590 
++   weak default version */
591 
++#ifdef CONFIG_PARAVIRT
592 
++void read_boot_clock64(struct timespec64 *ts)
593 
++{
594 
++	paravirt_read_boot_clock64(ts);
595 
++}
596 
++#endif
597 
+diff --git a/kernel/sched/clock.c b/kernel/sched/clock.c
598 
+index 284a7ba..615aeb4 100644
599 
+--- a/kernel/sched/clock.c
600 
+@@ -385,7 +385,12 @@ u64 cpu_clock(int cpu)
601 
+  */
602 
+ u64 local_clock(void)
603 
+ {
604 
+-#ifndef CONFIG_VMWARE
605 
++	/*
606 
++	 * sched_clock is stable and running for VMware guest.
607 
++	 * Let's disable this checking. It will allow us to have
608 
++	 * printk timestamps from the beginning
609 
++	 */
610 
++#if !defined(CONFIG_VMWARE_ONLY) || !defined(CONFIG_PRINTK_TIME)
611 
+ 	if (!sched_clock_stable())
612 
+ 		return sched_clock_cpu(raw_smp_processor_id());
613 
+ #endif
614 
+--
615 
+1.9.1
616 
+
617 
+
618 
+From aa93eaec3f709633007ab6ce3ddbb8aaa455b557 Mon Sep 17 00:00:00 2001
619 
+From: Alexey Makhalov <amakhalov@vmware.com>
620 
+Date: Thu, 5 Nov 2015 21:02:52 +0000
621 
+Subject: [PATCH 5/5] Fix clocksource_vmware issue in VM version <= 10
622 
+
623 
+---
624 
+ arch/x86/kernel/cpu/vmware.c | 48 +++++++++++++++++++++++++++++++++++++++++---
625 
+ 1 file changed, 45 insertions(+), 3 deletions(-)
626 
+
627 
+diff --git a/arch/x86/kernel/cpu/vmware.c b/arch/x86/kernel/cpu/vmware.c
628 
+index 1bf1fe3..0b89bb9 100644
629 
+--- a/arch/x86/kernel/cpu/vmware.c
630 
+@@ -79,7 +79,8 @@ static unsigned long vmware_get_tsc_khz(void)
631 
+
632 
+ #define CYC2NS_SCALE_FACTOR 8
633 
+ static struct cyc2ns_data vmware_cyc2ns;
634 
+-u64 __initdata tsc_at_head;
635 
++uint64_t __initdata tsc_at_head;
636 
++uint64_t __initdata vtsc_khz;
637 
+
638 
+ static cycle_t vmware_clock_get_cycles(struct clocksource *cs)
639 
+ {
640 
+@@ -95,11 +96,45 @@ static struct clocksource clocksource_vmware = {
641 
+ };
642 
+
643 
+ #ifdef CONFIG_VMWARE_ONLY
644 
++/*
645 
++ * clocksource_vmware_periodic - is a temporary clocksource only for
646 
++ * early boot initialization.
647 
++ * Hack to avoid infinite looping in calibrate_APIC_clock() when
648 
++ * tsc_deadline_timer is not supported by hypervisor (VM version <= 10)
649 
++ * calibrate_APIC_clock() relies on _periodic_ timer!
650 
++ * In that case we do not need to use clocksource that is valid for
651 
++ * hres/oneshot timer.
652 
++ */
653 
++static struct clocksource __initdata clocksource_vmware_periodic = {
654 
++	.name = "vmware-clock-periodic",
655 
++	.read = vmware_clock_get_cycles,
656 
++	.rating = 100,
657 
++	.mask = CLOCKSOURCE_MASK(64),
658 
++};
659 
++
660 
++static struct clocksource __initdata * initial_clocksource;
661 
++
662 
++/*
663 
++ * clocksource_vmware_register
664 
++ *
665 
++ * Time to register real clocksource. It will be activated in
666 
++ * clocksource_done_booting().
667 
++ */
668 
++static int __init clocksource_vmware_register(void)
669 
++{
670 
++	if (!boot_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER)) {
671 
++		clocksource_register_khz(&clocksource_vmware, vtsc_khz);
672 
++		clocksource_unregister(&clocksource_vmware_periodic);
673 
++	}
674 
++	return 0;
675 
++}
676 
++subsys_initcall(clocksource_vmware_register);
677 
++
678 
+ /* We want to use clocksource_vmware from the beginning to avoid drifting in
679 
+    monotonic clock */
680 
+ struct clocksource * __init clocksource_default_clock(void)
681 
+ {
682 
+-	return &clocksource_vmware;
683 
++	return initial_clocksource;
684 
+ }
685 
+ #endif
686 
+
687 
+@@ -147,7 +182,6 @@ static void __init paravirt_ops_setup(void)
688 
+
689 
+ static void __init vmware_platform_setup(void)
690 
+ {
691 
+-	uint64_t vtsc_khz;
692 
+ 	uint32_t eax, ebx, ecx, edx;
693 
+
694 
+ 	VMWARE_PORT(GETHZ, eax, ebx, ecx, edx);
695 
+@@ -169,7 +203,15 @@ static void __init vmware_platform_setup(void)
696 
+ 	vmware_cyc2ns.cyc2ns_shift = CYC2NS_SCALE_FACTOR;
697 
+ 	vmware_cyc2ns.cyc2ns_offset = tsc_at_head;
698 
+
699 
++#ifdef CONFIG_VMWARE_ONLY
700 
++	if (!boot_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER))
701 
++		initial_clocksource = &clocksource_vmware_periodic;
702 
++	else
703 
++		initial_clocksource = &clocksource_vmware;
704 
++	clocksource_register_khz(initial_clocksource, vtsc_khz);
705 
++#else
706 
+ 	clocksource_register_khz(&clocksource_vmware, vtsc_khz);
707 
++#endif
708 
+
709 
+ 	paravirt_ops_setup();
710 
+ }
711 
+--
712 
+1.9.1
713 
+
SPECS/linux/06-calibrate-delay-is-known-by-cpu-0.patch
History View file @ becc5c7
0 714 
deleted file mode 100644
... ... 
@@ -1,15 +0,0 @@
1 
-Based on 0008-smpboot.patch
2 
-by Arjan van de Ven <arjan@linux.intel.com>
3 
-
4 
-+++ linux-4.2/arch/x86/kernel/tsc.c	2015-08-31 19:47:43.188312566 +0000
5 
-@@ -1241,6 +1241,9 @@
6 
- 	if (!tsc_disabled && !cpu_has(&cpu_data(cpu), X86_FEATURE_CONSTANT_TSC))
7 
- 		return 0;
8 
-
9 
-+	if (cpu != 0)
10 
-+		return cpu_data(0).loops_per_jiffy;
11 
-+
12 
- 	for_each_online_cpu(i)
13 
- 		if (cpu_data(i).phys_proc_id == cpu_data(cpu).phys_proc_id)
14 
- 			return cpu_data(i).loops_per_jiffy;
SPECS/linux/07-perf.patch
History View file @ becc5c7
15 1 
deleted file mode 100644
... ... 
@@ -1,22 +0,0 @@
1 
-From: Arjan van de Ven <arjan@linux.intel.com>
2 
-Date: Wed, 11 Feb 2015 17:34:17 -0600
3 
-Subject: [PATCH 09/13] perf
4 
-
5 
-Author:    Arjan van de Ven <arjan@linux.intel.com>
6 
-
7 
-Signed-off-by: Miguel Bernal Marin <miguel.bernal.marin@linux.intel.com>
8 
- arch/x86/kernel/cpu/perf_event_intel.c | 2 +-
9 
- 1 file changed, 1 insertion(+), 1 deletion(-)
10 
-
11 
-+++ linux-4.2/arch/x86/kernel/cpu/perf_event_intel.c	2015-09-02 06:34:37.363514952 +0000
12 
-@@ -3338,7 +3338,7 @@
13 
- 	 */
14 
- 	if (x86_pmu.extra_regs) {
15 
- 		for (er = x86_pmu.extra_regs; er->msr; er++) {
16 
--			er->extra_msr_access = check_msr(er->msr, 0x1ffUL);
17 
-+			er->extra_msr_access = false;
18 
- 			/* Disable LBR select mapping */
19 
- 			if ((er->idx == EXTRA_REG_LBR) && !er->extra_msr_access)
20 
- 				x86_pmu.lbr_sel_map = NULL;
SPECS/linux/08-No-wait-for-the-known-devices.patch
History View file @ becc5c7
21 1 
deleted file mode 100644
... ... 
@@ -1,33 +0,0 @@
1 
-From: Arjan van de Ven <arjan@linux.intel.com>
2 
-Date: Mon, 22 Jun 2015 09:33:33 -0500
3 
-Subject: [PATCH 12/13] No wait for the known devices
4 
-
5 
-No wait for the known devices to complete their probing
6 
-
7 
-Author:    Arjan van de Ven <arjan@linux.intel.com>
8 
-
9 
-Signed-off-by: Miguel Bernal Marin <miguel.bernal.marin@linux.intel.com>
10 
- init/do_mounts.c | 4 +++-
11 
- 1 file changed, 3 insertions(+), 1 deletion(-)
12 
-
13 
-+++ linux-4.2/init/do_mounts.c	2015-08-31 19:54:43.674341896 +0000
14 
-@@ -28,6 +28,7 @@
15 
- #include <linux/slab.h>
16 
- #include <linux/ramfs.h>
17 
- #include <linux/shmem_fs.h>
18 
-+#include <linux/async.h>
19 
-
20 
- #include <linux/nfs_fs.h>
21 
- #include <linux/nfs_fs_sb.h>
22 
-@@ -563,7 +564,8 @@
23 
- 	 * For example, it is not atypical to wait 5 seconds here
24 
- 	 * for the touchpad of a laptop to initialize.
25 
- 	 */
26 
--	wait_for_device_probe();
27 
-+	//wait_for_device_probe();
28 
-+	async_synchronize_full();
29 
-
30 
- 	md_run_setup();
31 
-
SPECS/linux/09-Turn-mmput-into-an-async-function.patch
History View file @ becc5c7
32 1 
deleted file mode 100644
... ... 
@@ -1,87 +0,0 @@
1 
-From: Arjan van de Ven <arjan@linux.intel.com>
2 
-Date: Sat, 14 Feb 2015 10:05:23 -0600
3 
-Subject: [PATCH 13/13] Turn mmput into an async function
4 
-
5 
-mmput() is part of the process exit() path as well as many
6 
-other parts of the kernel.  The actual work (when count
7 
-hits 0) typically is part of exit() but can happen in all
8 
-other cases as well (due to something opening files in
9 
-/proc/<pid>/ for example).
10 
-
11 
-In the exit() path, the common case, this happens before
12 
-the parent is notified currently, which means that the
13 
-time mmput() takes delays the parent from doing more work.
14 
-(say, make that wants to call another copy of gcc).
15 
-
16 
-The cost of mmput() can be considerable, it will go all the
17 
-way into graphics drivers etc etc... so turning this async
18 
-will take this cost out of the latency sensitive path.
19 
-
20 
-Signed-off-by: Arjan van de Ven <arjan@linux.intel.com>
21 
-Signed-off-by: Miguel Bernal Marin <miguel.bernal.marin@linux.intel.com>
22 
- kernel/fork.c | 39 +++++++++++++++++++++++----------------
23 
- 1 file changed, 23 insertions(+), 16 deletions(-)
24 
-
25 
-+++ linux-4.2/kernel/fork.c	2015-08-31 19:54:49.489342168 +0000
26 
-@@ -74,6 +74,7 @@
27 
- #include <linux/uprobes.h>
28 
- #include <linux/aio.h>
29 
- #include <linux/compiler.h>
30 
-+#include <linux/async.h>
31 
- #include <linux/sysctl.h>
32 
-
33 
- #include <asm/pgtable.h>
34 
-@@ -685,6 +686,26 @@
35 
- }
36 
- EXPORT_SYMBOL_GPL(__mmdrop);
37 
-
38 
-+
39 
-+static void mmput_async(void *data, async_cookie_t cookie)
40 
-+{
41 
-+	struct mm_struct *mm = data;
42 
-+	uprobe_clear_state(mm);
43 
-+	exit_aio(mm);
44 
-+	ksm_exit(mm);
45 
-+	khugepaged_exit(mm); /* must run before exit_mmap */
46 
-+	exit_mmap(mm);
47 
-+	set_mm_exe_file(mm, NULL);
48 
-+	if (!list_empty(&mm->mmlist)) {
49 
-+		spin_lock(&mmlist_lock);
50 
-+		list_del(&mm->mmlist);
51 
-+		spin_unlock(&mmlist_lock);
52 
-+	}
53 
-+	if (mm->binfmt)
54 
-+		module_put(mm->binfmt->module);
55 
-+	mmdrop(mm);
56 
-+}
57 
-+
58 
- /*
59 
-  * Decrement the use count and release all resources for an mm.
60 
-  */
61 
-@@ -692,22 +713,8 @@
62 
- {
63 
- 	might_sleep();
64 
-
65 
--	if (atomic_dec_and_test(&mm->mm_users)) {
66 
--		uprobe_clear_state(mm);
67 
--		exit_aio(mm);
68 
--		ksm_exit(mm);
69 
--		khugepaged_exit(mm); /* must run before exit_mmap */
70 
--		exit_mmap(mm);
71 
--		set_mm_exe_file(mm, NULL);
72 
--		if (!list_empty(&mm->mmlist)) {
73 
--			spin_lock(&mmlist_lock);
74 
--			list_del(&mm->mmlist);
75 
--			spin_unlock(&mmlist_lock);
76 
--		}
77 
--		if (mm->binfmt)
78 
--			module_put(mm->binfmt->module);
79 
--		mmdrop(mm);
80 
--	}
81 
-+	if (atomic_dec_and_test(&mm->mm_users))
82 
-+		async_schedule(mmput_async, mm);
83 
- }
84 
- EXPORT_SYMBOL_GPL(mmput);
85 
-
SPECS/linux/10-ptdamage.patch
History View file @ becc5c7
86 1 
deleted file mode 100644
... ... 
@@ -1,24 +0,0 @@
1 
-Subject: reduce the damage from intel_pt by bailing out on cpus that don't support it
2 
-
3 
-
4 
-the intel_pt code does a series of expensive things BEFORE it changes the cpu capabilities
5 
-(and then bail out).
6 
-This is silly, bail out immediately on CPUs that don't have support for the feature.
7 
-This changes reduces out boot time by over 10%
8 
-
9 
-
10 
-Signed-off-by: Arjan van de Ven <arjan@linux.intel.com>
11 
-
12 
-+++ linux-4.1/arch/x86/kernel/cpu/perf_event_intel_pt.c	2015-07-08 10:51:20.025827021 -0400
13 
-@@ -1060,6 +1060,10 @@ static __init int pt_init(void)
14 
- {
15 
- 	int ret, cpu, prior_warn = 0;
16 
-
17 
-+
18 
-+	if (!test_cpu_cap(&boot_cpu_data, X86_FEATURE_INTEL_PT))
19 
-+		return -ENODEV;
20 
-+
21 
- 	BUILD_BUG_ON(sizeof(struct topa) > PAGE_SIZE);
22 
- 	get_online_cpus();
23 
- 	for_each_online_cpu(cpu) {
SPECS/linux/11-piix4-poweroff.patch
History View file @ becc5c7
24 1 
deleted file mode 100644
... ... 
@@ -1,13 +0,0 @@
1 
-Author: Alexey Makhalov <amakhalov@vmware.com>
2 
-Poweroff the VM by direct writing in PIIX4 reg.
3 
-
4 
-+++ linux-4.2/arch/x86/kernel/reboot.c	2015-09-04 21:57:31.599382587 +0000
5 
-@@ -653,6 +653,7 @@
6 
-
7 
- 	tboot_shutdown(TB_SHUTDOWN_HALT);
8 
-
9 
-+	outw(0x2000, 0x1004);
10 
- 	stop_this_cpu(NULL);
11 
- }
12 
-
SPECS/linux/12-sd-lower-log-level.patch
History View file @ becc5c7
13 1 
deleted file mode 100644
... ... 
@@ -1,14 +0,0 @@
1 
-Author: Alexey Makhalov <amakhalov@vmware.com>
2 
-Lower log level for "Assuming drive cache..." message.
3 
-
4 
-+++ linux-4.2/drivers/scsi/sd.c	2015-08-31 21:14:59.861926417 +0000
5 
-@@ -2483,7 +2483,7 @@
6 
- 				"Assuming drive cache: write back\n");
7 
- 		sdkp->WCE = 1;
8 
- 	} else {
9 
--		sd_first_printk(KERN_ERR, sdkp,
10 
-+		sd_first_printk(KERN_NOTICE, sdkp,
11 
- 				"Assuming drive cache: write through\n");
12 
- 		sdkp->WCE = 0;
13 
- 	}
SPECS/linux/config-esx-4.2.0
History View file @ becc5c7
... ... 
@@ -176,7 +176,14 @@ CONFIG_NET_NS=y
176 176 
 CONFIG_SCHED_AUTOGROUP=y
177 177 
 # CONFIG_SYSFS_DEPRECATED is not set
178 178 
 CONFIG_RELAY=y
179 
-# CONFIG_BLK_DEV_INITRD is not set
179 
+CONFIG_BLK_DEV_INITRD=y
180 
+CONFIG_INITRAMFS_SOURCE=""
181 
+CONFIG_RD_GZIP=y
182 
+CONFIG_RD_BZIP2=y
183 
+CONFIG_RD_LZMA=y
184 
+CONFIG_RD_XZ=y
185 
+CONFIG_RD_LZO=y
186 
+CONFIG_RD_LZ4=y
180 187 
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
181 188 
 CONFIG_SYSCTL=y
182 189 
 CONFIG_ANON_INODES=y
... ... 
@@ -332,11 +339,10 @@ CONFIG_BLOCK_COMPAT=y
332 332 
 # IO Schedulers
333 333 
 #
334 334 
 CONFIG_IOSCHED_NOOP=y
335 
-CONFIG_IOSCHED_DEADLINE=y
335 
+# CONFIG_IOSCHED_DEADLINE is not set
336 336 
 # CONFIG_IOSCHED_CFQ is not set
337 
-CONFIG_DEFAULT_DEADLINE=y
338 
-# CONFIG_DEFAULT_NOOP is not set
339 
-CONFIG_DEFAULT_IOSCHED="deadline"
337 
+CONFIG_DEFAULT_NOOP=y
338 
+CONFIG_DEFAULT_IOSCHED="noop"
340 339 
 CONFIG_PADATA=y
341 340 
 CONFIG_ASN1=y
342 341 
 CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
... ... 
@@ -360,7 +366,7 @@ CONFIG_FREEZER=y
360 360 
 CONFIG_ZONE_DMA=y
361 361 
 CONFIG_SMP=y
362 362 
 CONFIG_X86_FEATURE_NAMES=y
363 
-# CONFIG_X86_X2APIC is not set
363 
+CONFIG_X86_X2APIC=y
364 364 
 CONFIG_X86_MPPARSE=y
365 365 
 # CONFIG_X86_EXTENDED_PLATFORM is not set
366 366 
 # CONFIG_X86_INTEL_LPSS is not set
... ... 
@@ -370,10 +376,13 @@ CONFIG_X86_MPPARSE=y
370 370 
 CONFIG_HYPERVISOR_GUEST=y
371 371 
 CONFIG_PARAVIRT=y
372 372 
 # CONFIG_PARAVIRT_DEBUG is not set
373 
-CONFIG_PARAVIRT_SPINLOCKS=y
373 
+# CONFIG_PARAVIRT_SPINLOCKS is not set
374 374 
 # CONFIG_XEN is not set
375 375 
 # CONFIG_KVM_GUEST is not set
376 
-CONFIG_PARAVIRT_TIME_ACCOUNTING=y
376 
+CONFIG_VMWARE=y
377 
+CONFIG_VMWARE_ONLY=y
378 
+# CONFIG_PARAVIRT_TIME_ACCOUNTING is not set
379 
+CONFIG_PARAVIRT_CLOCK=y
377 380 
 CONFIG_NO_BOOTMEM=y
378 381 
 # CONFIG_MK8 is not set
379 382 
 # CONFIG_MPSC is not set
... ... 
@@ -524,6 +533,7 @@ CONFIG_ACPI_SYSTEM_POWER_STATES_SUPPORT=y
524 524 
 # CONFIG_ACPI_DOCK is not set
525 525 
 # CONFIG_ACPI_PROCESSOR is not set
526 526 
 # CONFIG_ACPI_CUSTOM_DSDT is not set
527 
+# CONFIG_ACPI_INITRD_TABLE_OVERRIDE is not set
527 528 
 # CONFIG_ACPI_DEBUG is not set
528 529 
 # CONFIG_ACPI_PCI_SLOT is not set
529 530 
 # CONFIG_X86_PM_TIMER is not set
... ... 
@@ -638,10 +648,10 @@ CONFIG_NET_IP_TUNNEL=m
638 638 
 # CONFIG_IP_MROUTE is not set
639 639 
 # CONFIG_SYN_COOKIES is not set
640 640 
 # CONFIG_NET_IPVTI is not set
641 
-# CONFIG_NET_UDP_TUNNEL is not set
642 
-# CONFIG_NET_FOU is not set
641 
+CONFIG_NET_UDP_TUNNEL=m
642 
+CONFIG_NET_FOU=m
643 643 
 # CONFIG_NET_FOU_IP_TUNNELS is not set
644 
-# CONFIG_GENEVE_CORE is not set
644 
+CONFIG_GENEVE_CORE=m
645 645 
 CONFIG_INET_AH=m
646 646 
 CONFIG_INET_ESP=m
647 647 
 CONFIG_INET_IPCOMP=m
... ... 
@@ -1021,12 +1031,16 @@ CONFIG_NET_SCH_FIFO=y
1021 1021 
 # CONFIG_DCB is not set
1022 1022 
 CONFIG_DNS_RESOLVER=m
1023 1023 
 # CONFIG_BATMAN_ADV is not set
1024 
-# CONFIG_OPENVSWITCH is not set
1024 
+CONFIG_OPENVSWITCH=m
1025 
+CONFIG_OPENVSWITCH_VXLAN=m
1026 
+CONFIG_OPENVSWITCH_GENEVE=m
1025 1027 
 CONFIG_VSOCKETS=y
1026 
-CONFIG_VMWARE_VMCI_VSOCKETS=m
1028 
+CONFIG_VMWARE_VMCI_VSOCKETS=y
1027 1029 
 # CONFIG_NETLINK_MMAP is not set
1028 1030 
 # CONFIG_NETLINK_DIAG is not set
1029 
-# CONFIG_MPLS is not set
1031 
+CONFIG_MPLS=y
1032 
+CONFIG_NET_MPLS_GSO=m
1033 
+# CONFIG_MPLS_ROUTING is not set
1030 1034 
 # CONFIG_HSR is not set
1031 1035 
 # CONFIG_NET_SWITCHDEV is not set
1032 1036 
 CONFIG_RPS=y
... ... 
@@ -1429,7 +1443,8 @@ CONFIG_NET_CORE=y
1429 1429 
 CONFIG_MACVLAN=m
1430 1430 
 # CONFIG_MACVTAP is not set
1431 1431 
 # CONFIG_IPVLAN is not set
1432 
-# CONFIG_VXLAN is not set
1432 
+CONFIG_VXLAN=m
1433 
+# CONFIG_GENEVE is not set
1433 1434 
 # CONFIG_NETCONSOLE is not set
1434 1435 
 # CONFIG_NETPOLL is not set
1435 1436 
 # CONFIG_NET_POLL_CONTROLLER is not set
... ... 
@@ -2913,10 +2928,25 @@ CONFIG_LIBCRC32C=y
2913 2913 
 # CONFIG_CRC8 is not set
2914 2914 
 # CONFIG_AUDIT_ARCH_COMPAT_GENERIC is not set
2915 2915 
 # CONFIG_RANDOM32_SELFTEST is not set
2916 
-CONFIG_ZLIB_INFLATE=m
2916 
+CONFIG_ZLIB_INFLATE=y
2917 2917 
 CONFIG_ZLIB_DEFLATE=m
2918 
-# CONFIG_XZ_DEC is not set
2919 
-# CONFIG_XZ_DEC_BCJ is not set
2918 
+CONFIG_LZO_DECOMPRESS=y
2919 
+CONFIG_LZ4_DECOMPRESS=y
2920 
+CONFIG_XZ_DEC=y
2921 
+CONFIG_XZ_DEC_X86=y
2922 
+CONFIG_XZ_DEC_POWERPC=y
2923 
+CONFIG_XZ_DEC_IA64=y
2924 
+CONFIG_XZ_DEC_ARM=y
2925 
+CONFIG_XZ_DEC_ARMTHUMB=y
2926 
+CONFIG_XZ_DEC_SPARC=y
2927 
+CONFIG_XZ_DEC_BCJ=y
2928 
+# CONFIG_XZ_DEC_TEST is not set
2929 
+CONFIG_DECOMPRESS_GZIP=y
2930 
+CONFIG_DECOMPRESS_BZIP2=y
2931 
+CONFIG_DECOMPRESS_LZMA=y
2932 
+CONFIG_DECOMPRESS_XZ=y
2933 
+CONFIG_DECOMPRESS_LZO=y
2934 
+CONFIG_DECOMPRESS_LZ4=y
2920 2935 
 CONFIG_TEXTSEARCH=y
2921 2936 
 CONFIG_TEXTSEARCH_KMP=m
2922 2937 
 CONFIG_TEXTSEARCH_BM=m
SPECS/linux/linux-esx.spec
History View file @ becc5c7
... ... 
@@ -2,7 +2,7 @@
2 2 
 Summary:        Kernel
3 3 
 Name:        linux-esx
4 4 
 Version:    4.2.0
5 
-Release:    4%{?dist}
5 
+Release:    5%{?dist}
6 6 
 License:    GPLv2
7 7 
 URL:        http://www.kernel.org/
8 8 
 Group:        System Environment/Kernel
... ... 
@@ -11,18 +11,11 @@ Distribution: Photon
11 11 
 Source0:    http://www.kernel.org/pub/linux/kernel/v4.x/linux-4.2.tar.xz
12 12 
 %define sha1 linux=5e65d0dc94298527726fcd7458b6126e60fb2a8a
13 13 
 Source1:	config-esx-%{version}
14 
-patch1:		01-blkdev-max-rq.patch
15 
-patch2:		02-sysrq-Skip-synchronize_rcu-if-there-is-no-old-op.patch
16 
-patch3:		03-enable-no-blink-by-default.patch
17 
-patch4:		04-vmstat-update-interval.patch
18 
-patch5:		05-pci-probe-vmware.patch
19 
-patch6:		06-calibrate-delay-is-known-by-cpu-0.patch
20 
-patch7:		07-perf.patch
21 
-patch8:		08-No-wait-for-the-known-devices.patch
22 
-patch9:		09-Turn-mmput-into-an-async-function.patch
23 
-Patch10:	10-ptdamage.patch
24 
-Patch11:	11-piix4-poweroff.patch
25 
-Patch12:	12-sd-lower-log-level.patch
14 
+patch1:		01-clear-linux.patch
15 
+patch2:		02-pci-probe.patch
16 
+patch3:		03-poweroff.patch
17 
+patch4:		04-quiet-boot.patch
18 
+patch5:		05-pv-ops.patch
26 19
27 20 
 BuildRequires:    bc
28 21 
 BuildRequires:    kbd
... ... 
@@ -65,13 +58,6 @@ The Linux package contains the Linux kernel doc files
65 65 
 %patch3 -p1
66 66 
 %patch4 -p1
67 67 
 %patch5 -p1
68 
-%patch6 -p1
69 
-%patch7 -p1
70 
-%patch8 -p1
71 
-%patch9 -p1
72 
-%patch10 -p1
73 
-%patch11 -p1
74 
-%patch12 -p1
75 68
76 69 
 %build
77 70 
 make mrproper
... ... 
@@ -93,7 +79,7 @@ cp -r Documentation/*        %{buildroot}%{_defaultdocdir}/linux-esx-%{version}
93 93 
 # TODO: noacpi acpi=off noapic pci=conf1,nodomains pcie_acpm=off pnpacpi=off
94 94 
 cat > %{buildroot}/boot/%{name}-%{version}-%{release}.cfg << "EOF"
95 95 
 # GRUB Environment Block
96 
-photon_cmdline=init=/lib/systemd/systemd tsc=reliable no_timer_check rcupdate.rcu_expedited=1 rootfstype=ext4 rw systemd.show_status=0 elevator=noop quiet nordrand noreplace-smp cpu_init_udelay=0  plymouth.enable=0
96 
+photon_cmdline=init=/lib/systemd/systemd no_timer_check rcupdate.rcu_expedited=1 rootfstype=ext4 rw systemd.show_status=0 quiet nordrand noreplace-smp cpu_init_udelay=0 plymouth.enable=0
97 97 
 photon_linux=/boot/vmlinuz-esx-%{version}
98 98 
 EOF
99 99
... ... 
@@ -121,6 +107,12 @@ ln -sf %{name}-%{version}-%{release}.cfg /boot/photon.cfg
121 121 
 /lib/modules/%{version}-esx/build
122 122
123 123 
 %changelog
124 
+*   Wed Oct 28 2015 Alexey Makhalov <amakhalov@vmware.com> 4.2.0-5
125 
+-   Import patches from kernel2 repo.
126 
+-   Added pv-ops patch (timekeeping related improvements).
127 
+-   Removed unnecessary cmdline params.
128 
+-   .config changes: elevator=noop by default, paravirt clock enable,
129 
+    initrd support, openvswitch module, x2apic enable.
124 130 
 *   Mon Sep 21 2015 Alexey Makhalov <amakhalov@vmware.com> 4.2.0-4
125 131 
 -   CDROM modules are added.
126 132 
 *   Thu Sep 17 2015 Alexey Makhalov <amakhalov@vmware.com> 4.2.0-3