Browse code
merge disasm code
- libclamav/Makefile.am
- libclamav/Makefile.in
- libclamav/disasm.c
- libclamav/disasm.h
- libclamav/disasmpriv.h
| ... | ... |
@@ -81,16 +81,16 @@ am_libclamav_la_OBJECTS = matcher-ac.lo matcher-bm.lo matcher.lo \ |
| 81 | 81 |
md5.lo others.lo readdb.lo cvd.lo dsig.lo str.lo scanners.lo \ |
| 82 | 82 |
textdet.lo filetypes.lo rtf.lo blob.lo mbox.lo message.lo \ |
| 83 | 83 |
table.lo text.lo ole2_extract.lo vba_extract.lo msexpand.lo \ |
| 84 |
- pe.lo upx.lo htmlnorm.lo chmunpack.lo rebuildpe.lo petite.lo \ |
|
| 85 |
- wwunpack.lo unsp.lo aspack.lo packlibs.lo fsg.lo mew.lo \ |
|
| 86 |
- upack.lo line.lo untar.lo unzip.lo inflate64.lo special.lo \ |
|
| 87 |
- binhex.lo is_tar.lo tnef.lo autoit.lo strlcpy.lo regcomp.lo \ |
|
| 88 |
- regerror.lo regexec.lo regfree.lo unarj.lo bzlib.lo nulsft.lo \ |
|
| 89 |
- infblock.lo pdf.lo spin.lo yc.lo elf.lo sis.lo uuencode.lo \ |
|
| 90 |
- phishcheck.lo phish_domaincheck_db.lo phish_whitelist.lo \ |
|
| 91 |
- regex_list.lo regex_suffix.lo mspack.lo cab.lo entconv.lo \ |
|
| 92 |
- hashtab.lo dconf.lo lzma_iface.lo explode.lo textnorm.lo \ |
|
| 93 |
- dlp.lo js-norm.lo |
|
| 84 |
+ pe.lo disasm.lo upx.lo htmlnorm.lo chmunpack.lo rebuildpe.lo \ |
|
| 85 |
+ petite.lo wwunpack.lo unsp.lo aspack.lo packlibs.lo fsg.lo \ |
|
| 86 |
+ mew.lo upack.lo line.lo untar.lo unzip.lo inflate64.lo \ |
|
| 87 |
+ special.lo binhex.lo is_tar.lo tnef.lo autoit.lo strlcpy.lo \ |
|
| 88 |
+ regcomp.lo regerror.lo regexec.lo regfree.lo unarj.lo bzlib.lo \ |
|
| 89 |
+ nulsft.lo infblock.lo pdf.lo spin.lo yc.lo elf.lo sis.lo \ |
|
| 90 |
+ uuencode.lo phishcheck.lo phish_domaincheck_db.lo \ |
|
| 91 |
+ phish_whitelist.lo regex_list.lo regex_suffix.lo mspack.lo \ |
|
| 92 |
+ cab.lo entconv.lo hashtab.lo dconf.lo lzma_iface.lo explode.lo \ |
|
| 93 |
+ textnorm.lo dlp.lo js-norm.lo |
|
| 94 | 94 |
libclamav_la_OBJECTS = $(am_libclamav_la_OBJECTS) |
| 95 | 95 |
libclamav_la_LINK = $(LIBTOOL) --tag=CC $(AM_LIBTOOLFLAGS) \ |
| 96 | 96 |
$(LIBTOOLFLAGS) --mode=link $(CCLD) $(AM_CFLAGS) $(CFLAGS) \ |
| ... | ... |
@@ -324,6 +324,9 @@ libclamav_la_SOURCES = \ |
| 324 | 324 |
msexpand.h \ |
| 325 | 325 |
pe.c \ |
| 326 | 326 |
pe.h \ |
| 327 |
+ disasm.c \ |
|
| 328 |
+ disasm.h \ |
|
| 329 |
+ disasmpriv.h \ |
|
| 327 | 330 |
upx.c \ |
| 328 | 331 |
upx.h \ |
| 329 | 332 |
htmlnorm.c \ |
| ... | ... |
@@ -544,6 +547,7 @@ distclean-compile: |
| 544 | 544 |
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/chmunpack.Plo@am__quote@ |
| 545 | 545 |
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cvd.Plo@am__quote@ |
| 546 | 546 |
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/dconf.Plo@am__quote@ |
| 547 |
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/disasm.Plo@am__quote@ |
|
| 547 | 548 |
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/dlp.Plo@am__quote@ |
| 548 | 549 |
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/dsig.Plo@am__quote@ |
| 549 | 550 |
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf.Plo@am__quote@ |
| 550 | 551 |
new file mode 100644 |
| ... | ... |
@@ -0,0 +1,1684 @@ |
| 0 |
+/* |
|
| 1 |
+ * Copyright (C) 2008 Sourcefire, Inc. |
|
| 2 |
+ * |
|
| 3 |
+ * Authors: aCaB <acab@clamav.net> |
|
| 4 |
+ * |
|
| 5 |
+ * This program is free software; you can redistribute it and/or modify |
|
| 6 |
+ * it under the terms of the GNU General Public License version 2 as |
|
| 7 |
+ * published by the Free Software Foundation. |
|
| 8 |
+ * |
|
| 9 |
+ * This program is distributed in the hope that it will be useful, |
|
| 10 |
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of |
|
| 11 |
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|
| 12 |
+ * GNU General Public License for more details. |
|
| 13 |
+ * |
|
| 14 |
+ * You should have received a copy of the GNU General Public License |
|
| 15 |
+ * along with this program; if not, write to the Free Software |
|
| 16 |
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, |
|
| 17 |
+ * MA 02110-1301, USA. |
|
| 18 |
+ */ |
|
| 19 |
+ |
|
| 20 |
+#include "disasmpriv.h" |
|
| 21 |
+ |
|
| 22 |
+enum ADDRS {
|
|
| 23 |
+ ADDR_REG_EAX, |
|
| 24 |
+ ADDR_REG_ECX, |
|
| 25 |
+ ADDR_REG_EDX, |
|
| 26 |
+ ADDR_REG_EBX, |
|
| 27 |
+ ADDR_REG_ESP, |
|
| 28 |
+ ADDR_REG_EBP, |
|
| 29 |
+ ADDR_REG_ESI, |
|
| 30 |
+ ADDR_REG_EDI, |
|
| 31 |
+ ADDR_REG_ES, |
|
| 32 |
+ ADDR_REG_CS, |
|
| 33 |
+ ADDR_REG_SS, |
|
| 34 |
+ ADDR_REG_DS, |
|
| 35 |
+ ADDR_REG_FS, |
|
| 36 |
+ ADDR_REG_GS, |
|
| 37 |
+ ADDR_MRM_GEN, |
|
| 38 |
+ ADDR_OFFSET, |
|
| 39 |
+ ADDR_MRM_GEN_EG, |
|
| 40 |
+ ADDR_MRM_GEN_GE, |
|
| 41 |
+ ADDR_MRM_GEN_GM, |
|
| 42 |
+ ADDR_MRM_GEN_ES, |
|
| 43 |
+ ADDR_MRM_GEN_SE, |
|
| 44 |
+ ADDR_MRM_EXTRA_1A, |
|
| 45 |
+ ADDR_MRM_EXTRA_1A_M, |
|
| 46 |
+ ADDR_MRM_GEN_RC, |
|
| 47 |
+ ADDR_MRM_GEN_RD, |
|
| 48 |
+ ADDR_MRM_GEN_CR, |
|
| 49 |
+ ADDR_MRM_GEN_DR, |
|
| 50 |
+ ADDR_IMMED, |
|
| 51 |
+ ADDR_RELJ, |
|
| 52 |
+ ADDR_IMPLICIT, |
|
| 53 |
+ ADDR_NOADDR |
|
| 54 |
+}; |
|
| 55 |
+ |
|
| 56 |
+enum ASIZE {
|
|
| 57 |
+ SIZE_BYTE, |
|
| 58 |
+ SIZE_BYTEH, |
|
| 59 |
+ SIZE_WORD, |
|
| 60 |
+ SIZE_DWORD, |
|
| 61 |
+ SIZE_QWORD, |
|
| 62 |
+ SIZE_WD, |
|
| 63 |
+ SIZE_DF, |
|
| 64 |
+ SIZE_NOSIZE |
|
| 65 |
+}; |
|
| 66 |
+ |
|
| 67 |
+static const uint8_t sizemap[SIZE_NOSIZE+1][2] = {
|
|
| 68 |
+ {1,1}, /* SIZE_BYTE */
|
|
| 69 |
+ {255,255}, /* SIZE_BYTEH */
|
|
| 70 |
+ {2,2}, /* SIZE_WORD */
|
|
| 71 |
+ {4,4}, /* SIZE_DWORD */
|
|
| 72 |
+ {255,255}, /* SIZE_QWORD */
|
|
| 73 |
+ {4,2}, /* SIZE_WD */
|
|
| 74 |
+ {6,4}, /* SIZE_DF */
|
|
| 75 |
+ {255,255} /* SIZE_NOSIZE */
|
|
| 76 |
+}; |
|
| 77 |
+ |
|
| 78 |
+static const uint8_t regmap[SIZE_DWORD+1][ADDR_REG_GS+1] = {
|
|
| 79 |
+ /* SIZE_BYTE */ |
|
| 80 |
+ {REG_AL, REG_CL, REG_DL, REG_BL, REG_INVALID, REG_INVALID, REG_INVALID, REG_INVALID, REG_INVALID, REG_INVALID, REG_INVALID, REG_INVALID, REG_INVALID, REG_INVALID},
|
|
| 81 |
+ /* SIZE_BYTEH */ |
|
| 82 |
+ {REG_AH, REG_CH, REG_DH, REG_BH, REG_INVALID, REG_INVALID, REG_INVALID, REG_INVALID, REG_INVALID, REG_INVALID, REG_INVALID, REG_INVALID, REG_INVALID, REG_INVALID},
|
|
| 83 |
+ /* SIZE_WORD */ |
|
| 84 |
+ {REG_AX, REG_CX, REG_DX, REG_BX, REG_SP, REG_BP, REG_SI, REG_DI, REG_ES, REG_CS, REG_SS, REG_DS, REG_FS, REG_GS},
|
|
| 85 |
+ /* SIZE_DWORD */ |
|
| 86 |
+ {REG_EAX, REG_ECX, REG_EDX, REG_EBX, REG_ESP, REG_EBP, REG_ESI, REG_EDI, REG_INVALID, REG_INVALID, REG_INVALID, REG_INVALID, REG_INVALID, REG_INVALID}
|
|
| 87 |
+}; |
|
| 88 |
+ |
|
| 89 |
+static const uint8_t mrm_regmap[3][8] = {
|
|
| 90 |
+ /* SIZEB */ |
|
| 91 |
+ {REG_AL, REG_CL, REG_DL, REG_BL, REG_AH, REG_CH, REG_DH, REG_BH},
|
|
| 92 |
+ /* SIZEW */ |
|
| 93 |
+ {REG_AX, REG_CX, REG_DX, REG_BX, REG_SP, REG_BP, REG_SI, REG_DI},
|
|
| 94 |
+ /* SIZED */ |
|
| 95 |
+ {REG_EAX, REG_ECX, REG_EDX, REG_EBX, REG_ESP, REG_EBP, REG_ESI, REG_EDI}
|
|
| 96 |
+}; |
|
| 97 |
+ |
|
| 98 |
+static const uint8_t mrm_sregmap[3][8] = {
|
|
| 99 |
+ /* SIZEB */ |
|
| 100 |
+ {REG_INVALID, REG_INVALID, REG_INVALID, REG_INVALID, REG_INVALID, REG_INVALID, REG_INVALID, REG_INVALID},
|
|
| 101 |
+ /* SIZEW */ |
|
| 102 |
+ {REG_ES, REG_CS, REG_SS, REG_DS, REG_FS, REG_GS, REG_INVALID, REG_INVALID},
|
|
| 103 |
+ /* SIZED */ |
|
| 104 |
+ {REG_INVALID, REG_INVALID, REG_INVALID, REG_INVALID, REG_INVALID, REG_INVALID, REG_INVALID, REG_INVALID}
|
|
| 105 |
+}; |
|
| 106 |
+ |
|
| 107 |
+static const uint8_t mrm_cregmap[3][8] = {
|
|
| 108 |
+ /* SIZEB */ |
|
| 109 |
+ {REG_INVALID, REG_INVALID, REG_INVALID, REG_INVALID, REG_INVALID, REG_INVALID, REG_INVALID, REG_INVALID},
|
|
| 110 |
+ /* SIZEW */ |
|
| 111 |
+ {REG_INVALID, REG_INVALID, REG_INVALID, REG_INVALID, REG_INVALID, REG_INVALID, REG_INVALID, REG_INVALID},
|
|
| 112 |
+ /* SIZED */ |
|
| 113 |
+ {REG_CR0, REG_INVALID, REG_CR2, REG_CR3, REG_CR4, REG_INVALID, REG_INVALID, REG_INVALID}
|
|
| 114 |
+}; |
|
| 115 |
+ |
|
| 116 |
+static const uint8_t mrm_dregmap[3][8] = {
|
|
| 117 |
+ /* SIZEB */ |
|
| 118 |
+ {REG_INVALID, REG_INVALID, REG_INVALID, REG_INVALID, REG_INVALID, REG_INVALID, REG_INVALID, REG_INVALID},
|
|
| 119 |
+ /* SIZEW */ |
|
| 120 |
+ {REG_INVALID, REG_INVALID, REG_INVALID, REG_INVALID, REG_INVALID, REG_INVALID, REG_INVALID, REG_INVALID},
|
|
| 121 |
+ /* SIZED */ |
|
| 122 |
+ {REG_DR0, REG_DR1, REG_DR2, REG_DR3, REG_INVALID, REG_INVALID, REG_DR6, REG_DR7}
|
|
| 123 |
+}; |
|
| 124 |
+ |
|
| 125 |
+static const struct {
|
|
| 126 |
+ enum X86REGS r1; |
|
| 127 |
+ enum X86REGS r2; |
|
| 128 |
+} mrm_regmapw[8] = {
|
|
| 129 |
+ {REG_BX, REG_SI}, {REG_BX, REG_DI}, {REG_BP, REG_SI}, {REG_BP, REG_DI}, {REG_SI, REG_INVALID}, {REG_DI, REG_INVALID}, {REG_BP, REG_INVALID}, {REG_BX, REG_INVALID}
|
|
| 130 |
+}; |
|
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+ |
|
| 132 |
+static const struct {
|
|
| 133 |
+ enum X86OPS op; |
|
| 134 |
+ enum DIS_SIZE size; |
|
| 135 |
+} x87_mrm[8][8] = {
|
|
| 136 |
+ /* D8 */ |
|
| 137 |
+ {{OP_FADD,SIZED},{OP_FMUL,SIZED},{OP_FCOM,SIZED},{OP_FCOMP,SIZED},{OP_FSUB,SIZED},{OP_FSUBR,SIZED},{OP_FDIV,SIZED},{OP_FDIVR,SIZED}},
|
|
| 138 |
+ /* D9 */ |
|
| 139 |
+ {{OP_FLD,SIZED},{OP_INVALID,SIZED},{OP_FST,SIZED},{OP_FSTP,SIZED},{OP_FLDENV,SIZEPTR},{OP_FLDCW,SIZEW},{OP_FSTENV,SIZEPTR},{OP_FSTCW,SIZEW}},
|
|
| 140 |
+ /* DA */ |
|
| 141 |
+ {{OP_FIADD,SIZED},{OP_FIMUL,SIZED},{OP_FICOM,SIZED},{OP_FICOMP,SIZED},{OP_FISUB,SIZED},{OP_FISUBR,SIZED},{OP_FIDIV,SIZED},{OP_FIDIVR,SIZED}},
|
|
| 142 |
+ /* DB */ |
|
| 143 |
+ {{OP_FILD,SIZED},{OP_FISTTP,SIZED},{OP_FIST,SIZED},{OP_FISTP,SIZED},{OP_INVALID,SIZED},{OP_FLD,SIZET},{OP_INVALID,SIZED},{OP_FSTP,SIZET} },
|
|
| 144 |
+ /* DC */ |
|
| 145 |
+ {{OP_FADD,SIZEQ},{OP_FMUL,SIZEQ},{OP_FCOM,SIZEQ},{OP_FCOMP,SIZEQ},{OP_FSUB,SIZEQ},{OP_FSUBR,SIZEQ},{OP_FDIV,SIZEQ},{OP_FDIVR,SIZEQ}},
|
|
| 146 |
+ /* DD */ |
|
| 147 |
+ {{OP_FLD,SIZEQ},{OP_FISTTP,SIZEQ},{OP_FST,SIZEQ},{OP_FSTP,SIZEQ},{OP_FRSTOR,SIZEPTR},{OP_INVALID,SIZED},{OP_FSAVE,SIZEPTR},{OP_FSTSW,SIZEW}},
|
|
| 148 |
+ /* DE */ |
|
| 149 |
+ {{OP_FIADD,SIZEW},{OP_FIMUL,SIZEW},{OP_FICOM,SIZEW},{OP_FICOMP,SIZEW},{OP_FISUB,SIZEW},{OP_FISUBR,SIZEW},{OP_FIDIV,SIZEW},{OP_FIDIVR,SIZEW}},
|
|
| 150 |
+ /* DF */ |
|
| 151 |
+ {{OP_FILD,SIZEW},{OP_FISTTP,SIZEW},{OP_FIST,SIZEW},{OP_FISTP,SIZEW},{OP_FBLD,SIZET},{OP_FILD,SIZEQ},{OP_FBSTP,SIZET},{OP_FISTP,SIZEQ}}
|
|
| 152 |
+}; |
|
| 153 |
+ |
|
| 154 |
+static const struct {
|
|
| 155 |
+ enum X86OPS op; |
|
| 156 |
+ enum { X87_NONE, X87_ONE, X87_S, X87_R } args;
|
|
| 157 |
+} x87_st[8][64] = {
|
|
| 158 |
+ /* D8 */ |
|
| 159 |
+ {
|
|
| 160 |
+ {OP_FADD,X87_S},{OP_FADD,X87_S},{OP_FADD,X87_S},{OP_FADD,X87_S},{OP_FADD,X87_S},{OP_FADD,X87_S},{OP_FADD,X87_S},{OP_FADD,X87_S},
|
|
| 161 |
+ {OP_FMUL,X87_S},{OP_FMUL,X87_S},{OP_FMUL,X87_S},{OP_FMUL,X87_S},{OP_FMUL,X87_S},{OP_FMUL,X87_S},{OP_FMUL,X87_S},{OP_FMUL,X87_S},
|
|
| 162 |
+ {OP_FCOM,X87_S},{OP_FCOM,X87_S},{OP_FCOM,X87_S},{OP_FCOM,X87_S},{OP_FCOM,X87_S},{OP_FCOM,X87_S},{OP_FCOM,X87_S},{OP_FCOM,X87_S},
|
|
| 163 |
+ {OP_FCOMP,X87_S},{OP_FCOMP,X87_S},{OP_FCOMP,X87_S},{OP_FCOMP,X87_S},{OP_FCOMP,X87_S},{OP_FCOMP,X87_S},{OP_FCOMP,X87_S},{OP_FCOMP,X87_S},
|
|
| 164 |
+ {OP_FSUB,X87_S},{OP_FSUB,X87_S},{OP_FSUB,X87_S},{OP_FSUB,X87_S},{OP_FSUB,X87_S},{OP_FSUB,X87_S},{OP_FSUB,X87_S},{OP_FSUB,X87_S},
|
|
| 165 |
+ {OP_FSUBR,X87_S},{OP_FSUBR,X87_S},{OP_FSUBR,X87_S},{OP_FSUBR,X87_S},{OP_FSUBR,X87_S},{OP_FSUBR,X87_S},{OP_FSUBR,X87_S},{OP_FSUBR,X87_S},
|
|
| 166 |
+ {OP_FDIV,X87_S},{OP_FDIV,X87_S},{OP_FDIV,X87_S},{OP_FDIV,X87_S},{OP_FDIV,X87_S},{OP_FDIV,X87_S},{OP_FDIV,X87_S},{OP_FDIV,X87_S},
|
|
| 167 |
+ {OP_FDIVR,X87_S},{OP_FDIVR,X87_S},{OP_FDIVR,X87_S},{OP_FDIVR,X87_S},{OP_FDIVR,X87_S},{OP_FDIVR,X87_S},{OP_FDIVR,X87_S},{OP_FDIVR,X87_S}
|
|
| 168 |
+ }, |
|
| 169 |
+ |
|
| 170 |
+ /* D9 */ |
|
| 171 |
+ {
|
|
| 172 |
+ {OP_FLD,X87_S},{OP_FLD,X87_S},{OP_FLD,X87_S},{OP_FLD,X87_S},{OP_FLD,X87_S},{OP_FLD,X87_S},{OP_FLD,X87_S},{OP_FLD,X87_S},
|
|
| 173 |
+ {OP_FXCH,X87_S},{OP_FXCH,X87_S},{OP_FXCH,X87_S},{OP_FXCH,X87_S},{OP_FXCH,X87_S},{OP_FXCH,X87_S},{OP_FXCH,X87_S},{OP_FXCH,X87_S},
|
|
| 174 |
+ {OP_FNOP,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},
|
|
| 175 |
+ {OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},
|
|
| 176 |
+ {OP_FCHS,X87_NONE},{OP_FABS,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_FTST,X87_NONE},{OP_FXAM,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},
|
|
| 177 |
+ {OP_FLD1,X87_NONE},{OP_FLDL2T,X87_NONE},{OP_FLDL2E,X87_NONE},{OP_FLDPI,X87_NONE},{OP_FLDLG2,X87_NONE},{OP_FLDLN2,X87_NONE},{OP_FLDZ,X87_S},{OP_INVALID,X87_NONE},
|
|
| 178 |
+ {OP_F2XM1,X87_NONE},{OP_FYL2X,X87_NONE},{OP_FPTAN,X87_NONE},{OP_FPATAN,X87_NONE},{OP_FXTRACT,X87_NONE},{OP_FPREM1,X87_NONE},{OP_FDECSTP,X87_NONE},{OP_FINCSTP,X87_NONE},
|
|
| 179 |
+ {OP_FPREM,X87_NONE},{OP_FYL2XP1,X87_NONE},{OP_FSQRT,X87_NONE},{OP_FSINCOS,X87_NONE},{OP_FRNDINT,X87_NONE},{OP_FSCALE,X87_NONE},{OP_FSIN,X87_NONE},{OP_FCOS,X87_NONE}
|
|
| 180 |
+ }, |
|
| 181 |
+ |
|
| 182 |
+ /* DA */ |
|
| 183 |
+ {
|
|
| 184 |
+ {OP_FCMOVB,X87_S},{OP_FCMOVB,X87_S},{OP_FCMOVB,X87_S},{OP_FCMOVB,X87_S},{OP_FCMOVB,X87_S},{OP_FCMOVB,X87_S},{OP_FCMOVB,X87_S},{OP_FCMOVB,X87_S},
|
|
| 185 |
+ {OP_FCMOVE,X87_S},{OP_FCMOVE,X87_S},{OP_FCMOVE,X87_S},{OP_FCMOVE,X87_S},{OP_FCMOVE,X87_S},{OP_FCMOVE,X87_S},{OP_FCMOVE,X87_S},{OP_FCMOVE,X87_S},
|
|
| 186 |
+ {OP_FCMOVBE,X87_S},{OP_FCMOVBE,X87_S},{OP_FCMOVBE,X87_S},{OP_FCMOVBE,X87_S},{OP_FCMOVBE,X87_S},{OP_FCMOVBE,X87_S},{OP_FCMOVBE,X87_S},{OP_FCMOVBE,X87_S},
|
|
| 187 |
+ {OP_FCMOVU,X87_S},{OP_FCMOVU,X87_S},{OP_FCMOVU,X87_S},{OP_FCMOVU,X87_S},{OP_FCMOVU,X87_S},{OP_FCMOVU,X87_S},{OP_FCMOVU,X87_S},{OP_FCMOVU,X87_S},
|
|
| 188 |
+ {OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},
|
|
| 189 |
+ {OP_INVALID,X87_NONE},{OP_FUCOMPP,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},
|
|
| 190 |
+ {OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},
|
|
| 191 |
+ {OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE}
|
|
| 192 |
+ }, |
|
| 193 |
+ |
|
| 194 |
+ /* DB */ |
|
| 195 |
+ {
|
|
| 196 |
+ {OP_FCMOVNB,X87_S},{OP_FCMOVNB,X87_S},{OP_FCMOVNB,X87_S},{OP_FCMOVNB,X87_S},{OP_FCMOVNB,X87_S},{OP_FCMOVNB,X87_S},{OP_FCMOVNB,X87_S},{OP_FCMOVNB,X87_S},
|
|
| 197 |
+ {OP_FCMOVNE,X87_S},{OP_FCMOVNE,X87_S},{OP_FCMOVNE,X87_S},{OP_FCMOVNE,X87_S},{OP_FCMOVNE,X87_S},{OP_FCMOVNE,X87_S},{OP_FCMOVNE,X87_S},{OP_FCMOVNE,X87_S},
|
|
| 198 |
+ {OP_FCMOVNBE,X87_S},{OP_FCMOVNBE,X87_S},{OP_FCMOVNBE,X87_S},{OP_FCMOVNBE,X87_S},{OP_FCMOVNBE,X87_S},{OP_FCMOVNBE,X87_S},{OP_FCMOVNBE,X87_S},{OP_FCMOVNBE,X87_S},
|
|
| 199 |
+ {OP_FCMOVNU,X87_S},{OP_FCMOVNU,X87_S},{OP_FCMOVNU,X87_S},{OP_FCMOVNU,X87_S},{OP_FCMOVNU,X87_S},{OP_FCMOVNU,X87_S},{OP_FCMOVNU,X87_S},{OP_FCMOVNU,X87_S},
|
|
| 200 |
+ {OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_FCLEX,X87_NONE},{OP_FINIT,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},
|
|
| 201 |
+ {OP_FUCOMI,X87_S},{OP_FUCOMI,X87_S},{OP_FUCOMI,X87_S},{OP_FUCOMI,X87_S},{OP_FUCOMI,X87_S},{OP_FUCOMI,X87_S},{OP_FUCOMI,X87_S},{OP_FUCOMI,X87_S},
|
|
| 202 |
+ {OP_FCOMI,X87_S},{OP_FCOMI,X87_S},{OP_FCOMI,X87_S},{OP_FCOMI,X87_S},{OP_FCOMI,X87_S},{OP_FCOMI,X87_S},{OP_FCOMI,X87_S},{OP_FCOMI,X87_S},
|
|
| 203 |
+ {OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE}
|
|
| 204 |
+ }, |
|
| 205 |
+ |
|
| 206 |
+ /* DC */ |
|
| 207 |
+ {
|
|
| 208 |
+ {OP_FADD,X87_R},{OP_FADD,X87_R},{OP_FADD,X87_R},{OP_FADD,X87_R},{OP_FADD,X87_R},{OP_FADD,X87_R},{OP_FADD,X87_R},{OP_FADD,X87_R},
|
|
| 209 |
+ {OP_FMUL,X87_R},{OP_FMUL,X87_R},{OP_FMUL,X87_R},{OP_FMUL,X87_R},{OP_FMUL,X87_R},{OP_FMUL,X87_R},{OP_FMUL,X87_R},{OP_FMUL,X87_R},
|
|
| 210 |
+ {OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},
|
|
| 211 |
+ {OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},
|
|
| 212 |
+ {OP_FSUBR,X87_R},{OP_FSUBR,X87_R},{OP_FSUBR,X87_R},{OP_FSUBR,X87_R},{OP_FSUBR,X87_R},{OP_FSUBR,X87_R},{OP_FSUBR,X87_R},{OP_FSUBR,X87_R},
|
|
| 213 |
+ {OP_FSUB,X87_R},{OP_FSUB,X87_R},{OP_FSUB,X87_R},{OP_FSUB,X87_R},{OP_FSUB,X87_R},{OP_FSUB,X87_R},{OP_FSUB,X87_R},{OP_FSUB,X87_R},
|
|
| 214 |
+ {OP_FDIVR,X87_R},{OP_FDIVR,X87_R},{OP_FDIVR,X87_R},{OP_FDIVR,X87_R},{OP_FDIVR,X87_R},{OP_FDIVR,X87_R},{OP_FDIVR,X87_R},{OP_FDIVR,X87_R},
|
|
| 215 |
+ {OP_FDIV,X87_R},{OP_FDIV,X87_R},{OP_FDIV,X87_R},{OP_FDIV,X87_R},{OP_FDIV,X87_R},{OP_FDIV,X87_R},{OP_FDIV,X87_R},{OP_FDIV,X87_R}
|
|
| 216 |
+ }, |
|
| 217 |
+ |
|
| 218 |
+ /* DD */ |
|
| 219 |
+ {
|
|
| 220 |
+ {OP_FFREE,X87_ONE},{OP_FFREE,X87_ONE},{OP_FFREE,X87_ONE},{OP_FFREE,X87_ONE},{OP_FFREE,X87_ONE},{OP_FFREE,X87_ONE},{OP_FFREE,X87_ONE},{OP_FFREE,X87_ONE},
|
|
| 221 |
+ {OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},
|
|
| 222 |
+ {OP_FST,X87_ONE},{OP_FST,X87_ONE},{OP_FST,X87_ONE},{OP_FST,X87_ONE},{OP_FST,X87_ONE},{OP_FST,X87_ONE},{OP_FST,X87_ONE},{OP_FST,X87_ONE},
|
|
| 223 |
+ {OP_FSTP,X87_ONE},{OP_FSTP,X87_ONE},{OP_FSTP,X87_ONE},{OP_FSTP,X87_ONE},{OP_FSTP,X87_ONE},{OP_FSTP,X87_ONE},{OP_FSTP,X87_ONE},{OP_FSTP,X87_ONE},
|
|
| 224 |
+ {OP_FUCOM,X87_R},{OP_FUCOM,X87_R},{OP_FUCOM,X87_R},{OP_FUCOM,X87_R},{OP_FUCOM,X87_R},{OP_FUCOM,X87_R},{OP_FUCOM,X87_R},{OP_FUCOM,X87_R},
|
|
| 225 |
+ {OP_FUCOMP,X87_R},{OP_FUCOMP,X87_R},{OP_FUCOMP,X87_R},{OP_FUCOMP,X87_R},{OP_FUCOMP,X87_R},{OP_FUCOMP,X87_R},{OP_FUCOMP,X87_R},{OP_FUCOMP,X87_R},
|
|
| 226 |
+ {OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},
|
|
| 227 |
+ {OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE}
|
|
| 228 |
+ }, |
|
| 229 |
+ |
|
| 230 |
+ /* DE */ |
|
| 231 |
+ {
|
|
| 232 |
+ {OP_FADDP,X87_R},{OP_FADDP,X87_R},{OP_FADDP,X87_R},{OP_FADDP,X87_R},{OP_FADDP,X87_R},{OP_FADDP,X87_R},{OP_FADDP,X87_R},{OP_FADDP,X87_R},
|
|
| 233 |
+ {OP_FMULP,X87_R},{OP_FMULP,X87_R},{OP_FMULP,X87_R},{OP_FMULP,X87_R},{OP_FMULP,X87_R},{OP_FMULP,X87_R},{OP_FMULP,X87_R},{OP_FMULP,X87_R},
|
|
| 234 |
+ {OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},
|
|
| 235 |
+ {OP_INVALID,X87_NONE},{OP_FCOMPP,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},
|
|
| 236 |
+ {OP_FSUBRP,X87_R},{OP_FSUBRP,X87_R},{OP_FSUBRP,X87_R},{OP_FSUBRP,X87_R},{OP_FSUBRP,X87_R},{OP_FSUBRP,X87_R},{OP_FSUBRP,X87_R},{OP_FSUBRP,X87_R},
|
|
| 237 |
+ {OP_FSUBP,X87_R},{OP_FSUBP,X87_R},{OP_FSUBP,X87_R},{OP_FSUBP,X87_R},{OP_FSUBP,X87_R},{OP_FSUBP,X87_R},{OP_FSUBP,X87_R},{OP_FSUBP,X87_R},
|
|
| 238 |
+ {OP_FDIVRP,X87_R},{OP_FDIVRP,X87_R},{OP_FDIVRP,X87_R},{OP_FDIVRP,X87_R},{OP_FDIVRP,X87_R},{OP_FDIVRP,X87_R},{OP_FDIVRP,X87_R},{OP_FDIVRP,X87_R},
|
|
| 239 |
+ {OP_FDIVP,X87_R},{OP_FDIVP,X87_R},{OP_FDIVP,X87_R},{OP_FDIVP,X87_R},{OP_FDIVP,X87_R},{OP_FDIVP,X87_R},{OP_FDIVP,X87_R},{OP_FDIVP,X87_R}
|
|
| 240 |
+ }, |
|
| 241 |
+ |
|
| 242 |
+ /* DF */ |
|
| 243 |
+ {
|
|
| 244 |
+ {OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},
|
|
| 245 |
+ {OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},
|
|
| 246 |
+ {OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},
|
|
| 247 |
+ {OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},
|
|
| 248 |
+ {OP_INVALID,X87_NONE},{OP_FSTSW,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},
|
|
| 249 |
+ {OP_FUCOMIP,X87_S},{OP_FUCOMIP,X87_S},{OP_FUCOMIP,X87_S},{OP_FUCOMIP,X87_S},{OP_FUCOMIP,X87_S},{OP_FUCOMIP,X87_S},{OP_FUCOMIP,X87_S},{OP_FUCOMIP,X87_S},
|
|
| 250 |
+ {OP_FCOMIP,X87_S},{OP_FCOMIP,X87_S},{OP_FCOMIP,X87_S},{OP_FCOMIP,X87_S},{OP_FCOMIP,X87_S},{OP_FCOMIP,X87_S},{OP_FCOMIP,X87_S},{OP_FCOMIP,X87_S},
|
|
| 251 |
+ {OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE},{OP_INVALID,X87_NONE}
|
|
| 252 |
+ } |
|
| 253 |
+}; |
|
| 254 |
+ |
|
| 255 |
+ |
|
| 256 |
+static const char *mnemonic[] = {
|
|
| 257 |
+ "Invalid opcode", |
|
| 258 |
+ "aaa", |
|
| 259 |
+ "aam", |
|
| 260 |
+ "aad", |
|
| 261 |
+ "aas", |
|
| 262 |
+ "add", |
|
| 263 |
+ "adc", |
|
| 264 |
+ "and", |
|
| 265 |
+ "arpl", |
|
| 266 |
+ "bound", |
|
| 267 |
+ "bsf", |
|
| 268 |
+ "bsr", |
|
| 269 |
+ "bswap", |
|
| 270 |
+ "bt", |
|
| 271 |
+ "btc", |
|
| 272 |
+ "btr", |
|
| 273 |
+ "bts", |
|
| 274 |
+ "call", |
|
| 275 |
+ "cdq", |
|
| 276 |
+ "cwd", |
|
| 277 |
+ "cwde", |
|
| 278 |
+ "cbw", |
|
| 279 |
+ "clc", |
|
| 280 |
+ "cld", |
|
| 281 |
+ "cli", |
|
| 282 |
+ "clts", |
|
| 283 |
+ "cmc", |
|
| 284 |
+ "cmovo", |
|
| 285 |
+ "cmovno", |
|
| 286 |
+ "cmovc", |
|
| 287 |
+ "cmovnc", |
|
| 288 |
+ "cmovz", |
|
| 289 |
+ "cmovnz", |
|
| 290 |
+ "cmovbe", |
|
| 291 |
+ "cmova", |
|
| 292 |
+ "cmovs", |
|
| 293 |
+ "cmovns", |
|
| 294 |
+ "cmovp", |
|
| 295 |
+ "cmovnp", |
|
| 296 |
+ "cmovl", |
|
| 297 |
+ "cmovge", |
|
| 298 |
+ "cmovle", |
|
| 299 |
+ "cmovg", |
|
| 300 |
+ "cmp", |
|
| 301 |
+ "cmpsd", |
|
| 302 |
+ "cmpsw", |
|
| 303 |
+ "cmpsb", |
|
| 304 |
+ "cmpxchg", |
|
| 305 |
+ "cmpxchg8b", |
|
| 306 |
+ "cpuid", |
|
| 307 |
+ "daa", |
|
| 308 |
+ "das", |
|
| 309 |
+ "dec", |
|
| 310 |
+ "div", |
|
| 311 |
+ "enter", |
|
| 312 |
+ "fwait", |
|
| 313 |
+ "hlt", |
|
| 314 |
+ "idiv", |
|
| 315 |
+ "imul", |
|
| 316 |
+ "inc", |
|
| 317 |
+ "in", |
|
| 318 |
+ "insd", |
|
| 319 |
+ "insw", |
|
| 320 |
+ "insb", |
|
| 321 |
+ "int", |
|
| 322 |
+ "int3", |
|
| 323 |
+ "into", |
|
| 324 |
+ "invd", |
|
| 325 |
+ "invlpg", |
|
| 326 |
+ "iret", |
|
| 327 |
+ "jo", |
|
| 328 |
+ "jno", |
|
| 329 |
+ "jc", |
|
| 330 |
+ "jnc", |
|
| 331 |
+ "jz", |
|
| 332 |
+ "jnz", |
|
| 333 |
+ "jbe", |
|
| 334 |
+ "ja", |
|
| 335 |
+ "js", |
|
| 336 |
+ "jns", |
|
| 337 |
+ "jp", |
|
| 338 |
+ "jnp", |
|
| 339 |
+ "jl", |
|
| 340 |
+ "jge", |
|
| 341 |
+ "jle", |
|
| 342 |
+ "jg", |
|
| 343 |
+ "jmp", |
|
| 344 |
+ "lahf", |
|
| 345 |
+ "lar", |
|
| 346 |
+ "lds", |
|
| 347 |
+ "les", |
|
| 348 |
+ "lfs", |
|
| 349 |
+ "lgs", |
|
| 350 |
+ "lea", |
|
| 351 |
+ "leave", |
|
| 352 |
+ "lgdt", |
|
| 353 |
+ "lidt", |
|
| 354 |
+ "lldt", |
|
| 355 |
+ "lock", |
|
| 356 |
+ "lodsd", |
|
| 357 |
+ "lodsw", |
|
| 358 |
+ "lodsb", |
|
| 359 |
+ "loop", |
|
| 360 |
+ "loope", |
|
| 361 |
+ "loopne", |
|
| 362 |
+ "lsl", |
|
| 363 |
+ "lss", |
|
| 364 |
+ "ltr", |
|
| 365 |
+ "mov", |
|
| 366 |
+ "movsd", |
|
| 367 |
+ "movsw", |
|
| 368 |
+ "movsb", |
|
| 369 |
+ "movsx", |
|
| 370 |
+ "movzx", |
|
| 371 |
+ "mul", |
|
| 372 |
+ "neg", |
|
| 373 |
+ "nop", |
|
| 374 |
+ "not", |
|
| 375 |
+ "or", |
|
| 376 |
+ "out", |
|
| 377 |
+ "outsd", |
|
| 378 |
+ "outsw", |
|
| 379 |
+ "outsb", |
|
| 380 |
+ "push", |
|
| 381 |
+ "pushad", |
|
| 382 |
+ "pusha", |
|
| 383 |
+ "pushfd", |
|
| 384 |
+ "pushf", |
|
| 385 |
+ "pop", |
|
| 386 |
+ "popad", |
|
| 387 |
+ "popfd", |
|
| 388 |
+ "popf", |
|
| 389 |
+ "rcl", |
|
| 390 |
+ "rcr", |
|
| 391 |
+ "rdmsr", |
|
| 392 |
+ "rdpmc", |
|
| 393 |
+ "rdtsc", |
|
| 394 |
+ "repe", |
|
| 395 |
+ "repne", |
|
| 396 |
+ "retf", |
|
| 397 |
+ "retn", |
|
| 398 |
+ "rol", |
|
| 399 |
+ "ror", |
|
| 400 |
+ "rsm", |
|
| 401 |
+ "sahf", |
|
| 402 |
+ "sar", |
|
| 403 |
+ "sbb", |
|
| 404 |
+ "scasd", |
|
| 405 |
+ "scasw", |
|
| 406 |
+ "scasb", |
|
| 407 |
+ "seto", |
|
| 408 |
+ "setno", |
|
| 409 |
+ "setc", |
|
| 410 |
+ "setnc", |
|
| 411 |
+ "setz", |
|
| 412 |
+ "setnz", |
|
| 413 |
+ "setbe", |
|
| 414 |
+ "seta", |
|
| 415 |
+ "sets", |
|
| 416 |
+ "setns", |
|
| 417 |
+ "setp", |
|
| 418 |
+ "setnp", |
|
| 419 |
+ "setl", |
|
| 420 |
+ "setge", |
|
| 421 |
+ "setle", |
|
| 422 |
+ "setg", |
|
| 423 |
+ "sgdt", |
|
| 424 |
+ "sidt", |
|
| 425 |
+ "shl", |
|
| 426 |
+ "shld", |
|
| 427 |
+ "shr", |
|
| 428 |
+ "shrd", |
|
| 429 |
+ "sldt", |
|
| 430 |
+ "stosd", |
|
| 431 |
+ "stosw", |
|
| 432 |
+ "stosb", |
|
| 433 |
+ "str", |
|
| 434 |
+ "stc", |
|
| 435 |
+ "std", |
|
| 436 |
+ "sti", |
|
| 437 |
+ "sub", |
|
| 438 |
+ "syscall", |
|
| 439 |
+ "sysenter", |
|
| 440 |
+ "sysexit", |
|
| 441 |
+ "sysret", |
|
| 442 |
+ "test", |
|
| 443 |
+ "ud2", |
|
| 444 |
+ "verr", |
|
| 445 |
+ "verrw", |
|
| 446 |
+ "wbinvd", |
|
| 447 |
+ "wrmsr", |
|
| 448 |
+ "xadd", |
|
| 449 |
+ "xchg", |
|
| 450 |
+ "xlat", |
|
| 451 |
+ "xor", |
|
| 452 |
+ "Operand Size", |
|
| 453 |
+ "Address Size", |
|
| 454 |
+ "Segment Override", |
|
| 455 |
+ "2byte escape", |
|
| 456 |
+ "FPU escape", |
|
| 457 |
+ |
|
| 458 |
+ "f2xm1", |
|
| 459 |
+ "fabs", |
|
| 460 |
+ "fadd", |
|
| 461 |
+ "faddp", |
|
| 462 |
+ "fbld", |
|
| 463 |
+ "fbstp", |
|
| 464 |
+ "fchs", |
|
| 465 |
+ "fclex", |
|
| 466 |
+ "fcmovb", |
|
| 467 |
+ "fcmovbe", |
|
| 468 |
+ "fcmove", |
|
| 469 |
+ "fcmovnb", |
|
| 470 |
+ "fcmovnbe", |
|
| 471 |
+ "fcmovne", |
|
| 472 |
+ "fcmovnu", |
|
| 473 |
+ "fcmovu", |
|
| 474 |
+ "fcom", |
|
| 475 |
+ "fcomi", |
|
| 476 |
+ "fcomip", |
|
| 477 |
+ "fcomp", |
|
| 478 |
+ "fcompp", |
|
| 479 |
+ "fcos", |
|
| 480 |
+ "fdecstp", |
|
| 481 |
+ "fdiv", |
|
| 482 |
+ "fdivp", |
|
| 483 |
+ "fdivr", |
|
| 484 |
+ "fdivrp", |
|
| 485 |
+ "ffree", |
|
| 486 |
+ "fiadd", |
|
| 487 |
+ "ficom", |
|
| 488 |
+ "ficomp", |
|
| 489 |
+ "fidiv", |
|
| 490 |
+ "fidivr", |
|
| 491 |
+ "fild", |
|
| 492 |
+ "fimul", |
|
| 493 |
+ "fincstp", |
|
| 494 |
+ "finit", |
|
| 495 |
+ "fist", |
|
| 496 |
+ "fistp", |
|
| 497 |
+ "fisttp", |
|
| 498 |
+ "fisub", |
|
| 499 |
+ "fisubr", |
|
| 500 |
+ "fld", |
|
| 501 |
+ "fld1", |
|
| 502 |
+ "fldcw", |
|
| 503 |
+ "fldenv", |
|
| 504 |
+ "fldl2e", |
|
| 505 |
+ "fldl2t", |
|
| 506 |
+ "fldlg2", |
|
| 507 |
+ "fldln2", |
|
| 508 |
+ "fldpi", |
|
| 509 |
+ "fldz", |
|
| 510 |
+ "fmul", |
|
| 511 |
+ "fmulp", |
|
| 512 |
+ "fnop", |
|
| 513 |
+ "fpatan", |
|
| 514 |
+ "fprem", |
|
| 515 |
+ "fprem1", |
|
| 516 |
+ "fptan", |
|
| 517 |
+ "frndint", |
|
| 518 |
+ "frstor", |
|
| 519 |
+ "fscale", |
|
| 520 |
+ "fsin", |
|
| 521 |
+ "fsincos", |
|
| 522 |
+ "fsqrt", |
|
| 523 |
+ "fsave", |
|
| 524 |
+ "fst", |
|
| 525 |
+ "fstcw", |
|
| 526 |
+ "fstenv", |
|
| 527 |
+ "fstp", |
|
| 528 |
+ "fstsw", |
|
| 529 |
+ "fsub", |
|
| 530 |
+ "fsubp", |
|
| 531 |
+ "fsubr", |
|
| 532 |
+ "fsubrp", |
|
| 533 |
+ "ftst", |
|
| 534 |
+ "fucom", |
|
| 535 |
+ "fucomi", |
|
| 536 |
+ "fucomip", |
|
| 537 |
+ "fucomp", |
|
| 538 |
+ "fucompp", |
|
| 539 |
+ "fxam", |
|
| 540 |
+ "fxch", |
|
| 541 |
+ "fxtract", |
|
| 542 |
+ "fyl2x", |
|
| 543 |
+ "fyl2xp1" |
|
| 544 |
+}; |
|
| 545 |
+ |
|
| 546 |
+struct OPCODES {
|
|
| 547 |
+ enum ADDRS dmethod; |
|
| 548 |
+ enum ASIZE dsize; |
|
| 549 |
+ enum ADDRS smethod; |
|
| 550 |
+ enum ASIZE ssize; |
|
| 551 |
+ enum X86OPS op; |
|
| 552 |
+}; |
|
| 553 |
+ |
|
| 554 |
+static const struct {
|
|
| 555 |
+ enum X86OPS op; |
|
| 556 |
+ enum { ADDSZ_ZERO, ADDSZ_ONE } addsz;
|
|
| 557 |
+} extra_1a[][8] = {
|
|
| 558 |
+ /* 8f - pop */ |
|
| 559 |
+ {{OP_POP,0}, {OP_INVALID,0}, {OP_INVALID,0}, {OP_INVALID,0}, {OP_INVALID,0}, {OP_INVALID,0}, {OP_INVALID,0}, {OP_INVALID,0}},
|
|
| 560 |
+ /* 80-83 - GRP1 */ |
|
| 561 |
+ {{OP_ADD,0}, {OP_OR,0}, {OP_ADC,0}, {OP_SBB,0}, {OP_AND,0}, {OP_SUB,0}, {OP_XOR,0}, {OP_CMP,0}},
|
|
| 562 |
+ /* c0-c1, d0-d3 - GRP2 */ |
|
| 563 |
+ {{OP_ROL,0}, {OP_ROR,0}, {OP_RCL,0}, {OP_RCR,0}, {OP_SHL,0}, {OP_SHR,0}, {OP_INVALID,0}, {OP_SAR,0}},
|
|
| 564 |
+ /* fe - GRP4 */ |
|
| 565 |
+ {{OP_INC,0}, {OP_DEC,0}, {OP_INVALID,0}, {OP_INVALID,0}, {OP_INVALID,0}, {OP_INVALID,0}, {OP_INVALID,0}, {OP_INVALID,0}},
|
|
| 566 |
+ /* ff - GRP5 */ |
|
| 567 |
+ {{OP_INC,0}, {OP_DEC,0}, {OP_CALL,0}, {OP_CALL,1}, {OP_JMP,0}, {OP_JMP,1}, {OP_PUSH,0}, {OP_INVALID,0}},
|
|
| 568 |
+ /* c6-c7 GRP11 */ |
|
| 569 |
+ {{OP_MOV,0}, {OP_INVALID,0}, {OP_INVALID,0}, {OP_INVALID,0}, {OP_INVALID,0}, {OP_INVALID,0}, {OP_INVALID,0}, {OP_INVALID,0}},
|
|
| 570 |
+ /* f6-f7 - GRP3 */ |
|
| 571 |
+ {{OP_TEST,0}, {OP_INVALID,0}, {OP_NOT,0}, {OP_NEG,0}, {OP_MUL,0}, {OP_IMUL,0}, {OP_DIV,0}, {OP_IDIV,0}},
|
|
| 572 |
+ /* 0f00 - GRP6 */ |
|
| 573 |
+ {{OP_SLDT,0}, {OP_STR,0}, {OP_LLDT,0}, {OP_LTR,0}, {OP_VERR,0}, {OP_VERRW,0}, {OP_INVALID,0}, {OP_INVALID,0}},
|
|
| 574 |
+ /* 0f90 - SETO */ |
|
| 575 |
+ {{OP_SETO,0}, {OP_SETO,0}, {OP_SETO,0}, {OP_SETO,0}, {OP_SETO,0}, {OP_SETO,0}, {OP_SETO,0}, {OP_SETO,0}},
|
|
| 576 |
+ /* 0f91 - SETNO */ |
|
| 577 |
+ {{OP_SETNO,0}, {OP_SETNO,0}, {OP_SETNO,0}, {OP_SETNO,0}, {OP_SETNO,0}, {OP_SETNO,0}, {OP_SETNO,0}, {OP_SETNO,0}},
|
|
| 578 |
+ /* 0f92 - SETC */ |
|
| 579 |
+ {{OP_SETC,0}, {OP_SETC,0}, {OP_SETC,0}, {OP_SETC,0}, {OP_SETC,0}, {OP_SETC,0}, {OP_SETC,0}, {OP_SETC,0}},
|
|
| 580 |
+ /* 0f93 - SETNC */ |
|
| 581 |
+ {{OP_SETNC,0}, {OP_SETNC,0}, {OP_SETNC,0}, {OP_SETNC,0}, {OP_SETNC,0}, {OP_SETNC,0}, {OP_SETNC,0}, {OP_SETNC,0}},
|
|
| 582 |
+ /* 0f94 - SETZ */ |
|
| 583 |
+ {{OP_SETZ,0}, {OP_SETZ,0}, {OP_SETZ,0}, {OP_SETZ,0}, {OP_SETZ,0}, {OP_SETZ,0}, {OP_SETZ,0}, {OP_SETZ,0}},
|
|
| 584 |
+ /* 0f95 - SETNZ */ |
|
| 585 |
+ {{OP_SETNO,0}, {OP_SETNO,0}, {OP_SETNO,0}, {OP_SETNO,0}, {OP_SETNO,0}, {OP_SETNO,0}, {OP_SETNO,0}, {OP_SETNO,0}},
|
|
| 586 |
+ /* 0f96 - SETNB */ |
|
| 587 |
+ {{OP_SETBE,0}, {OP_SETBE,0}, {OP_SETBE,0}, {OP_SETBE,0}, {OP_SETBE,0}, {OP_SETBE,0}, {OP_SETBE,0}, {OP_SETBE,0}},
|
|
| 588 |
+ /* 0f97 - SETNA */ |
|
| 589 |
+ {{OP_SETA,0}, {OP_SETA,0}, {OP_SETA,0}, {OP_SETA,0}, {OP_SETA,0}, {OP_SETA,0}, {OP_SETA,0}, {OP_SETA,0}},
|
|
| 590 |
+ /* 0f98 - SETS */ |
|
| 591 |
+ {{OP_SETS,0}, {OP_SETS,0}, {OP_SETS,0}, {OP_SETS,0}, {OP_SETS,0}, {OP_SETS,0}, {OP_SETS,0}, {OP_SETS,0}},
|
|
| 592 |
+ /* 0f98 - SETNS */ |
|
| 593 |
+ {{OP_SETNS,0}, {OP_SETNS,0}, {OP_SETNS,0}, {OP_SETNS,0}, {OP_SETNS,0}, {OP_SETNS,0}, {OP_SETNS,0}, {OP_SETNS,0}},
|
|
| 594 |
+ /* 0f9a - SETP */ |
|
| 595 |
+ {{OP_SETP,0}, {OP_SETP,0}, {OP_SETP,0}, {OP_SETP,0}, {OP_SETP,0}, {OP_SETP,0}, {OP_SETP,0}, {OP_SETP,0}},
|
|
| 596 |
+ /* 0f9b - SETNP */ |
|
| 597 |
+ {{OP_SETNP,0}, {OP_SETNP,0}, {OP_SETNP,0}, {OP_SETNP,0}, {OP_SETNP,0}, {OP_SETNP,0}, {OP_SETNP,0}, {OP_SETNP,0}},
|
|
| 598 |
+ /* 0f9c - SETL */ |
|
| 599 |
+ {{OP_SETL,0}, {OP_SETL,0}, {OP_SETL,0}, {OP_SETL,0}, {OP_SETL,0}, {OP_SETL,0}, {OP_SETL,0}, {OP_SETL,0}},
|
|
| 600 |
+ /* 0f9d - SETGE */ |
|
| 601 |
+ {{OP_SETGE,0}, {OP_SETGE,0}, {OP_SETGE,0}, {OP_SETGE,0}, {OP_SETGE,0}, {OP_SETGE,0}, {OP_SETGE,0}, {OP_SETGE,0}},
|
|
| 602 |
+ /* 0f9e - SETLE */ |
|
| 603 |
+ {{OP_SETLE,0}, {OP_SETLE,0}, {OP_SETLE,0}, {OP_SETLE,0}, {OP_SETLE,0}, {OP_SETLE,0}, {OP_SETLE,0}, {OP_SETLE,0}},
|
|
| 604 |
+ /* 0f9f - SETG */ |
|
| 605 |
+ {{OP_SETG,0}, {OP_SETG,0}, {OP_SETG,0}, {OP_SETG,0}, {OP_SETG,0}, {OP_SETG,0}, {OP_SETG,0}, {OP_SETG,0}},
|
|
| 606 |
+ /* 0fba - GRP8 */ |
|
| 607 |
+ {{OP_INVALID,0}, {OP_INVALID,0}, {OP_INVALID,0}, {OP_INVALID,0}, {OP_BT,0}, {OP_BTS,0}, {OP_BTR,0}, {OP_BTC,0}},
|
|
| 608 |
+ /* 0fc7 - GRP9 */ |
|
| 609 |
+ {{OP_INVALID,0}, {OP_CMPXCHG8B,2}, {OP_INVALID,0}, {OP_INVALID,0}, {OP_INVALID,0}, {OP_INVALID,0}, {OP_INVALID,0}, {OP_INVALID,0}},
|
|
| 610 |
+ /* 0f01 - GRP7 */ |
|
| 611 |
+ {{OP_SGDT,3}, {OP_SIDT,3}, {OP_LGDT,3}, {OP_LIDT,3}, {OP_INVALID,0}, {OP_INVALID,0}, {OP_INVALID,0}, {OP_INVLPG,0}},
|
|
| 612 |
+}; |
|
| 613 |
+ |
|
| 614 |
+#define PUSHOP(a,b,c,d,e,f) {b,c,d,e,f}
|
|
| 615 |
+#define OP_UNSUP OP_INVALID |
|
| 616 |
+static const struct OPCODES x86ops[2][256] = {{
|
|
| 617 |
+ PUSHOP(0x00, ADDR_MRM_GEN_EG, SIZE_BYTE, ADDR_NOADDR, SIZE_NOSIZE, OP_ADD), |
|
| 618 |
+ PUSHOP(0x01, ADDR_MRM_GEN_EG, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_ADD), |
|
| 619 |
+ PUSHOP(0x02, ADDR_MRM_GEN_GE, SIZE_BYTE, ADDR_NOADDR, SIZE_NOSIZE, OP_ADD), |
|
| 620 |
+ PUSHOP(0x03, ADDR_MRM_GEN_GE, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_ADD), |
|
| 621 |
+ PUSHOP(0x04, ADDR_REG_EAX, SIZE_BYTE, ADDR_IMMED, SIZE_BYTE, OP_ADD), |
|
| 622 |
+ PUSHOP(0x05, ADDR_REG_EAX, SIZE_WD, ADDR_IMMED, SIZE_WD, OP_ADD), |
|
| 623 |
+ PUSHOP(0x06, ADDR_REG_ES, SIZE_WORD, ADDR_NOADDR, SIZE_NOSIZE, OP_PUSH), |
|
| 624 |
+ PUSHOP(0x07, ADDR_REG_ES, SIZE_WORD, ADDR_NOADDR, SIZE_NOSIZE, OP_POP), |
|
| 625 |
+ PUSHOP(0x08, ADDR_MRM_GEN_EG, SIZE_BYTE, ADDR_NOADDR, SIZE_NOSIZE, OP_OR), |
|
| 626 |
+ PUSHOP(0x09, ADDR_MRM_GEN_EG, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_OR), |
|
| 627 |
+ PUSHOP(0x0a, ADDR_MRM_GEN_GE, SIZE_BYTE, ADDR_NOADDR, SIZE_NOSIZE, OP_OR), |
|
| 628 |
+ PUSHOP(0x0b, ADDR_MRM_GEN_GE, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_OR), |
|
| 629 |
+ PUSHOP(0x0c, ADDR_REG_EAX, SIZE_BYTE, ADDR_IMMED, SIZE_BYTE, OP_OR), |
|
| 630 |
+ PUSHOP(0x0d, ADDR_REG_EAX, SIZE_WD, ADDR_IMMED, SIZE_WD, OP_OR), |
|
| 631 |
+ PUSHOP(0x0e, ADDR_REG_CS, SIZE_WORD, ADDR_NOADDR, SIZE_NOSIZE, OP_PUSH), |
|
| 632 |
+ PUSHOP(0x0f, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_2BYTE), |
|
| 633 |
+ |
|
| 634 |
+ PUSHOP(0x10, ADDR_MRM_GEN_EG, SIZE_BYTE, ADDR_NOADDR, SIZE_NOSIZE, OP_ADC), |
|
| 635 |
+ PUSHOP(0x11, ADDR_MRM_GEN_EG, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_ADC), |
|
| 636 |
+ PUSHOP(0x12, ADDR_MRM_GEN_GE, SIZE_BYTE, ADDR_NOADDR, SIZE_NOSIZE, OP_ADC), |
|
| 637 |
+ PUSHOP(0x13, ADDR_MRM_GEN_GE, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_ADC), |
|
| 638 |
+ PUSHOP(0x14, ADDR_REG_EAX, SIZE_BYTE, ADDR_IMMED, SIZE_BYTE, OP_ADC), |
|
| 639 |
+ PUSHOP(0x15, ADDR_REG_EAX, SIZE_WD, ADDR_IMMED, SIZE_WD, OP_ADC), |
|
| 640 |
+ PUSHOP(0x16, ADDR_REG_SS, SIZE_WORD, ADDR_NOADDR, SIZE_NOSIZE, OP_PUSH), |
|
| 641 |
+ PUSHOP(0x17, ADDR_REG_SS, SIZE_WORD, ADDR_NOADDR, SIZE_NOSIZE, OP_POP), |
|
| 642 |
+ PUSHOP(0x18, ADDR_MRM_GEN_EG, SIZE_BYTE, ADDR_NOADDR, SIZE_NOSIZE, OP_SBB), |
|
| 643 |
+ PUSHOP(0x19, ADDR_MRM_GEN_EG, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_SBB), |
|
| 644 |
+ PUSHOP(0x1a, ADDR_MRM_GEN_GE, SIZE_BYTE, ADDR_NOADDR, SIZE_NOSIZE, OP_SBB), |
|
| 645 |
+ PUSHOP(0x1b, ADDR_MRM_GEN_GE, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_SBB), |
|
| 646 |
+ PUSHOP(0x1c, ADDR_REG_EAX, SIZE_BYTE, ADDR_IMMED, SIZE_BYTE, OP_SBB), |
|
| 647 |
+ PUSHOP(0x1d, ADDR_REG_EAX, SIZE_WD, ADDR_IMMED, SIZE_WD, OP_SBB), |
|
| 648 |
+ PUSHOP(0x1e, ADDR_REG_DS, SIZE_WORD, ADDR_NOADDR, SIZE_NOSIZE, OP_PUSH), |
|
| 649 |
+ PUSHOP(0x1f, ADDR_REG_DS, SIZE_WORD, ADDR_NOADDR, SIZE_NOSIZE, OP_POP), |
|
| 650 |
+ |
|
| 651 |
+ PUSHOP(0x20, ADDR_MRM_GEN_EG, SIZE_BYTE, ADDR_NOADDR, SIZE_NOSIZE, OP_AND), |
|
| 652 |
+ PUSHOP(0x21, ADDR_MRM_GEN_EG, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_AND), |
|
| 653 |
+ PUSHOP(0x22, ADDR_MRM_GEN_GE, SIZE_BYTE, ADDR_NOADDR, SIZE_NOSIZE, OP_AND), |
|
| 654 |
+ PUSHOP(0x23, ADDR_MRM_GEN_GE, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_AND), |
|
| 655 |
+ PUSHOP(0x24, ADDR_REG_EAX, SIZE_BYTE, ADDR_IMMED, SIZE_BYTE, OP_AND), |
|
| 656 |
+ PUSHOP(0x25, ADDR_REG_EAX, SIZE_WD, ADDR_IMMED, SIZE_WD, OP_AND), |
|
| 657 |
+ PUSHOP(0x26, ADDR_REG_ES, SIZE_WORD, ADDR_NOADDR, SIZE_NOSIZE, OP_PREFIX_SEGMENT), |
|
| 658 |
+ PUSHOP(0x27, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_DAA), |
|
| 659 |
+ PUSHOP(0x28, ADDR_MRM_GEN_EG, SIZE_BYTE, ADDR_NOADDR, SIZE_NOSIZE, OP_SUB), |
|
| 660 |
+ PUSHOP(0x29, ADDR_MRM_GEN_EG, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_SUB), |
|
| 661 |
+ PUSHOP(0x2a, ADDR_MRM_GEN_GE, SIZE_BYTE, ADDR_NOADDR, SIZE_NOSIZE, OP_SUB), |
|
| 662 |
+ PUSHOP(0x2b, ADDR_MRM_GEN_GE, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_SUB), |
|
| 663 |
+ PUSHOP(0x2c, ADDR_REG_EAX, SIZE_BYTE, ADDR_IMMED, SIZE_BYTE, OP_SUB), |
|
| 664 |
+ PUSHOP(0x2d, ADDR_REG_EAX, SIZE_WD, ADDR_IMMED, SIZE_WD, OP_SUB), |
|
| 665 |
+ PUSHOP(0x2e, ADDR_REG_CS, SIZE_WORD, ADDR_NOADDR, SIZE_NOSIZE, OP_PREFIX_SEGMENT), |
|
| 666 |
+ PUSHOP(0x2f, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_DAS), |
|
| 667 |
+ |
|
| 668 |
+ PUSHOP(0x30, ADDR_MRM_GEN_EG, SIZE_BYTE, ADDR_NOADDR, SIZE_NOSIZE, OP_XOR), |
|
| 669 |
+ PUSHOP(0x31, ADDR_MRM_GEN_EG, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_XOR), |
|
| 670 |
+ PUSHOP(0x32, ADDR_MRM_GEN_GE, SIZE_BYTE, ADDR_NOADDR, SIZE_NOSIZE, OP_XOR), |
|
| 671 |
+ PUSHOP(0x33, ADDR_MRM_GEN_GE, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_XOR), |
|
| 672 |
+ PUSHOP(0x34, ADDR_REG_EAX, SIZE_BYTE, ADDR_IMMED, SIZE_BYTE, OP_XOR), |
|
| 673 |
+ PUSHOP(0x35, ADDR_REG_EAX, SIZE_WD, ADDR_IMMED, SIZE_WD, OP_XOR), |
|
| 674 |
+ PUSHOP(0x36, ADDR_REG_SS, SIZE_WORD, ADDR_NOADDR, SIZE_NOSIZE, OP_PREFIX_SEGMENT), |
|
| 675 |
+ PUSHOP(0x37, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_AAA), |
|
| 676 |
+ PUSHOP(0x38, ADDR_MRM_GEN_EG, SIZE_BYTE, ADDR_NOADDR, SIZE_NOSIZE, OP_CMP), |
|
| 677 |
+ PUSHOP(0x39, ADDR_MRM_GEN_EG, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_CMP), |
|
| 678 |
+ PUSHOP(0x3a, ADDR_MRM_GEN_GE, SIZE_BYTE, ADDR_NOADDR, SIZE_NOSIZE, OP_CMP), |
|
| 679 |
+ PUSHOP(0x3b, ADDR_MRM_GEN_GE, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_CMP), |
|
| 680 |
+ PUSHOP(0x3c, ADDR_REG_EAX, SIZE_BYTE, ADDR_IMMED, SIZE_BYTE, OP_CMP), |
|
| 681 |
+ PUSHOP(0x3d, ADDR_REG_EAX, SIZE_WD, ADDR_IMMED, SIZE_WD, OP_CMP), |
|
| 682 |
+ PUSHOP(0x3e, ADDR_REG_DS, SIZE_WORD, ADDR_NOADDR, SIZE_NOSIZE, OP_PREFIX_SEGMENT), |
|
| 683 |
+ PUSHOP(0x3f, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_AAS), |
|
| 684 |
+ |
|
| 685 |
+ PUSHOP(0x40, ADDR_REG_EAX, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_INC), |
|
| 686 |
+ PUSHOP(0x41, ADDR_REG_ECX, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_INC), |
|
| 687 |
+ PUSHOP(0x42, ADDR_REG_EDX, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_INC), |
|
| 688 |
+ PUSHOP(0x43, ADDR_REG_EBX, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_INC), |
|
| 689 |
+ PUSHOP(0x44, ADDR_REG_ESP, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_INC), |
|
| 690 |
+ PUSHOP(0x45, ADDR_REG_EBP, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_INC), |
|
| 691 |
+ PUSHOP(0x46, ADDR_REG_ESI, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_INC), |
|
| 692 |
+ PUSHOP(0x47, ADDR_REG_EDI, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_INC), |
|
| 693 |
+ PUSHOP(0x48, ADDR_REG_EAX, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_DEC), |
|
| 694 |
+ PUSHOP(0x49, ADDR_REG_ECX, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_DEC), |
|
| 695 |
+ PUSHOP(0x4a, ADDR_REG_EDX, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_DEC), |
|
| 696 |
+ PUSHOP(0x4b, ADDR_REG_EBX, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_DEC), |
|
| 697 |
+ PUSHOP(0x4c, ADDR_REG_ESP, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_DEC), |
|
| 698 |
+ PUSHOP(0x4d, ADDR_REG_EBP, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_DEC), |
|
| 699 |
+ PUSHOP(0x4e, ADDR_REG_ESI, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_DEC), |
|
| 700 |
+ PUSHOP(0x4f, ADDR_REG_EDI, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_DEC), |
|
| 701 |
+ |
|
| 702 |
+ PUSHOP(0x50, ADDR_REG_EAX, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_PUSH), |
|
| 703 |
+ PUSHOP(0x51, ADDR_REG_ECX, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_PUSH), |
|
| 704 |
+ PUSHOP(0x52, ADDR_REG_EDX, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_PUSH), |
|
| 705 |
+ PUSHOP(0x53, ADDR_REG_EBX, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_PUSH), |
|
| 706 |
+ PUSHOP(0x54, ADDR_REG_ESP, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_PUSH), |
|
| 707 |
+ PUSHOP(0x55, ADDR_REG_EBP, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_PUSH), |
|
| 708 |
+ PUSHOP(0x56, ADDR_REG_ESI, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_PUSH), |
|
| 709 |
+ PUSHOP(0x57, ADDR_REG_EDI, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_PUSH), |
|
| 710 |
+ PUSHOP(0x58, ADDR_REG_EAX, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_POP), |
|
| 711 |
+ PUSHOP(0x59, ADDR_REG_ECX, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_POP), |
|
| 712 |
+ PUSHOP(0x5a, ADDR_REG_EDX, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_POP), |
|
| 713 |
+ PUSHOP(0x5b, ADDR_REG_EBX, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_POP), |
|
| 714 |
+ PUSHOP(0x5c, ADDR_REG_ESP, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_POP), |
|
| 715 |
+ PUSHOP(0x5d, ADDR_REG_EBP, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_POP), |
|
| 716 |
+ PUSHOP(0x5e, ADDR_REG_ESI, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_POP), |
|
| 717 |
+ PUSHOP(0x5f, ADDR_REG_EDI, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_POP), |
|
| 718 |
+ |
|
| 719 |
+ PUSHOP(0x60, ADDR_NOADDR, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_PUSHAD), |
|
| 720 |
+ PUSHOP(0x61, ADDR_NOADDR, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_POPAD), |
|
| 721 |
+ PUSHOP(0x62, ADDR_MRM_GEN_GM, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_BOUND), |
|
| 722 |
+ PUSHOP(0x63, ADDR_MRM_GEN_EG, SIZE_WORD, ADDR_NOADDR, SIZE_NOSIZE, OP_ARPL), |
|
| 723 |
+ PUSHOP(0x64, ADDR_REG_FS, SIZE_WORD, ADDR_NOADDR, SIZE_NOSIZE, OP_PREFIX_SEGMENT), |
|
| 724 |
+ PUSHOP(0x65, ADDR_REG_GS, SIZE_WORD, ADDR_NOADDR, SIZE_NOSIZE, OP_PREFIX_SEGMENT), |
|
| 725 |
+ PUSHOP(0x66, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_PREFIX_OPSIZE), |
|
| 726 |
+ PUSHOP(0x67, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_PREFIX_ADDRSIZE), |
|
| 727 |
+ PUSHOP(0x68, ADDR_IMMED, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_PUSH), |
|
| 728 |
+ PUSHOP(0x69, ADDR_MRM_GEN_GE, SIZE_WD, ADDR_IMMED, SIZE_WD, OP_IMUL), |
|
| 729 |
+ PUSHOP(0x6a, ADDR_IMMED, SIZE_BYTE, ADDR_NOADDR, SIZE_NOSIZE, OP_PUSH), |
|
| 730 |
+ PUSHOP(0x6b, ADDR_MRM_GEN_GE, SIZE_WD, ADDR_IMMED, SIZE_BYTE, OP_IMUL), |
|
| 731 |
+ PUSHOP(0x6c, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_INSB), |
|
| 732 |
+ PUSHOP(0x6d, ADDR_NOADDR, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_INSD), |
|
| 733 |
+ PUSHOP(0x6e, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_OUTSB), |
|
| 734 |
+ PUSHOP(0x6f, ADDR_NOADDR, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_OUTSD), |
|
| 735 |
+ |
|
| 736 |
+ PUSHOP(0x70, ADDR_RELJ, SIZE_BYTE, ADDR_NOADDR, SIZE_NOSIZE, OP_JO), |
|
| 737 |
+ PUSHOP(0x71, ADDR_RELJ, SIZE_BYTE, ADDR_NOADDR, SIZE_NOSIZE, OP_JNO), |
|
| 738 |
+ PUSHOP(0x72, ADDR_RELJ, SIZE_BYTE, ADDR_NOADDR, SIZE_NOSIZE, OP_JC), |
|
| 739 |
+ PUSHOP(0x73, ADDR_RELJ, SIZE_BYTE, ADDR_NOADDR, SIZE_NOSIZE, OP_JNC), |
|
| 740 |
+ PUSHOP(0x74, ADDR_RELJ, SIZE_BYTE, ADDR_NOADDR, SIZE_NOSIZE, OP_JZ), |
|
| 741 |
+ PUSHOP(0x75, ADDR_RELJ, SIZE_BYTE, ADDR_NOADDR, SIZE_NOSIZE, OP_JNZ), |
|
| 742 |
+ PUSHOP(0x76, ADDR_RELJ, SIZE_BYTE, ADDR_NOADDR, SIZE_NOSIZE, OP_JBE), |
|
| 743 |
+ PUSHOP(0x77, ADDR_RELJ, SIZE_BYTE, ADDR_NOADDR, SIZE_NOSIZE, OP_JA), |
|
| 744 |
+ PUSHOP(0x78, ADDR_RELJ, SIZE_BYTE, ADDR_NOADDR, SIZE_NOSIZE, OP_JS), |
|
| 745 |
+ PUSHOP(0x79, ADDR_RELJ, SIZE_BYTE, ADDR_NOADDR, SIZE_NOSIZE, OP_JNS), |
|
| 746 |
+ PUSHOP(0x7a, ADDR_RELJ, SIZE_BYTE, ADDR_NOADDR, SIZE_NOSIZE, OP_JP), |
|
| 747 |
+ PUSHOP(0x7b, ADDR_RELJ, SIZE_BYTE, ADDR_NOADDR, SIZE_NOSIZE, OP_JNP), |
|
| 748 |
+ PUSHOP(0x7c, ADDR_RELJ, SIZE_BYTE, ADDR_NOADDR, SIZE_NOSIZE, OP_JL), |
|
| 749 |
+ PUSHOP(0x7d, ADDR_RELJ, SIZE_BYTE, ADDR_NOADDR, SIZE_NOSIZE, OP_JGE), |
|
| 750 |
+ PUSHOP(0x7e, ADDR_RELJ, SIZE_BYTE, ADDR_NOADDR, SIZE_NOSIZE, OP_JLE), |
|
| 751 |
+ PUSHOP(0x7f, ADDR_RELJ, SIZE_BYTE, ADDR_NOADDR, SIZE_NOSIZE, OP_JG), |
|
| 752 |
+ |
|
| 753 |
+ PUSHOP(0x80, ADDR_MRM_EXTRA_1A, SIZE_BYTE, ADDR_IMMED, SIZE_BYTE, 1), |
|
| 754 |
+ PUSHOP(0x81, ADDR_MRM_EXTRA_1A, SIZE_WD, ADDR_IMMED, SIZE_WD, 1), |
|
| 755 |
+ PUSHOP(0x82, ADDR_MRM_EXTRA_1A, SIZE_BYTE, ADDR_IMMED, SIZE_BYTE, 1), |
|
| 756 |
+ PUSHOP(0x83, ADDR_MRM_EXTRA_1A, SIZE_WD, ADDR_IMMED, SIZE_BYTE, 1), |
|
| 757 |
+ PUSHOP(0x84, ADDR_MRM_GEN_EG, SIZE_BYTE, ADDR_NOADDR, SIZE_NOSIZE, OP_TEST), |
|
| 758 |
+ PUSHOP(0x85, ADDR_MRM_GEN_EG, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_TEST), |
|
| 759 |
+ PUSHOP(0x86, ADDR_MRM_GEN_EG, SIZE_BYTE, ADDR_NOADDR, SIZE_NOSIZE, OP_XCHG), |
|
| 760 |
+ PUSHOP(0x87, ADDR_MRM_GEN_EG, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_XCHG), |
|
| 761 |
+ PUSHOP(0x88, ADDR_MRM_GEN_EG, SIZE_BYTE, ADDR_NOADDR, SIZE_NOSIZE, OP_MOV), |
|
| 762 |
+ PUSHOP(0x89, ADDR_MRM_GEN_EG, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_MOV), |
|
| 763 |
+ PUSHOP(0x8a, ADDR_MRM_GEN_GE, SIZE_BYTE, ADDR_NOADDR, SIZE_NOSIZE, OP_MOV), |
|
| 764 |
+ PUSHOP(0x8b, ADDR_MRM_GEN_GE, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_MOV), |
|
| 765 |
+ PUSHOP(0x8c, ADDR_MRM_GEN_ES, SIZE_WORD, ADDR_NOADDR, SIZE_NOSIZE, OP_MOV), |
|
| 766 |
+ PUSHOP(0x8d, ADDR_MRM_GEN_GM, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_LEA), |
|
| 767 |
+ PUSHOP(0x8e, ADDR_MRM_GEN_SE, SIZE_WORD, ADDR_NOADDR, SIZE_NOSIZE, OP_MOV), |
|
| 768 |
+ PUSHOP(0x8f, ADDR_MRM_EXTRA_1A, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, 0), |
|
| 769 |
+ |
|
| 770 |
+ PUSHOP(0x90, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_NOP), |
|
| 771 |
+ PUSHOP(0x91, ADDR_REG_ECX, SIZE_WD, ADDR_REG_EAX, SIZE_WD, OP_XCHG), |
|
| 772 |
+ PUSHOP(0x92, ADDR_REG_EDX, SIZE_WD, ADDR_REG_EAX, SIZE_WD, OP_XCHG), |
|
| 773 |
+ PUSHOP(0x93, ADDR_REG_EBX, SIZE_WD, ADDR_REG_EAX, SIZE_WD, OP_XCHG), |
|
| 774 |
+ PUSHOP(0x94, ADDR_REG_ESP, SIZE_WD, ADDR_REG_EAX, SIZE_WD, OP_XCHG), |
|
| 775 |
+ PUSHOP(0x95, ADDR_REG_EBX, SIZE_WD, ADDR_REG_EAX, SIZE_WD, OP_XCHG), |
|
| 776 |
+ PUSHOP(0x96, ADDR_REG_ESI, SIZE_WD, ADDR_REG_EAX, SIZE_WD, OP_XCHG), |
|
| 777 |
+ PUSHOP(0x97, ADDR_REG_EDI, SIZE_WD, ADDR_REG_EAX, SIZE_WD, OP_XCHG), |
|
| 778 |
+ PUSHOP(0x98, ADDR_NOADDR, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_CWDE), |
|
| 779 |
+ PUSHOP(0x99, ADDR_NOADDR, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_CDQ), |
|
| 780 |
+ PUSHOP(0x9a, ADDR_IMMED, SIZE_DF, ADDR_NOADDR, SIZE_NOSIZE, OP_CALL), |
|
| 781 |
+ PUSHOP(0x9b, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_FWAIT), |
|
| 782 |
+ PUSHOP(0x9c, ADDR_NOADDR, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_PUSHFD), |
|
| 783 |
+ PUSHOP(0x9d, ADDR_NOADDR, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_POPFD), |
|
| 784 |
+ PUSHOP(0x9e, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_SAHF), |
|
| 785 |
+ PUSHOP(0x9f, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_LAHF), |
|
| 786 |
+ |
|
| 787 |
+ PUSHOP(0xa0, ADDR_REG_EAX, SIZE_BYTE, ADDR_OFFSET, SIZE_BYTE, OP_MOV), |
|
| 788 |
+ PUSHOP(0xa1, ADDR_REG_EAX, SIZE_WD, ADDR_OFFSET, SIZE_WD, OP_MOV), |
|
| 789 |
+ PUSHOP(0xa2, ADDR_OFFSET, SIZE_BYTE, ADDR_REG_EAX, SIZE_BYTE, OP_MOV), |
|
| 790 |
+ PUSHOP(0xa3, ADDR_OFFSET, SIZE_WD, ADDR_REG_EAX, SIZE_WD, OP_MOV), |
|
| 791 |
+ PUSHOP(0xa4, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_MOVSB), |
|
| 792 |
+ PUSHOP(0xa5, ADDR_NOADDR, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_MOVSD), |
|
| 793 |
+ PUSHOP(0xa6, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_CMPSB), |
|
| 794 |
+ PUSHOP(0xa7, ADDR_NOADDR, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_CMPSD), |
|
| 795 |
+ PUSHOP(0xa8, ADDR_REG_EAX, SIZE_BYTE, ADDR_IMMED, SIZE_BYTE, OP_TEST), |
|
| 796 |
+ PUSHOP(0xa9, ADDR_REG_EAX, SIZE_WD, ADDR_IMMED, SIZE_WD, OP_TEST), |
|
| 797 |
+ PUSHOP(0xaa, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_STOSB), |
|
| 798 |
+ PUSHOP(0xab, ADDR_NOADDR, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_STOSD), |
|
| 799 |
+ PUSHOP(0xac, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_LODSB), |
|
| 800 |
+ PUSHOP(0xad, ADDR_NOADDR, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_LODSD), |
|
| 801 |
+ PUSHOP(0xae, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_SCASB), |
|
| 802 |
+ PUSHOP(0xaf, ADDR_NOADDR, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_SCASD), |
|
| 803 |
+ |
|
| 804 |
+ PUSHOP(0xb0, ADDR_REG_EAX, SIZE_BYTE, ADDR_IMMED, SIZE_BYTE, OP_MOV), |
|
| 805 |
+ PUSHOP(0xb1, ADDR_REG_ECX, SIZE_BYTE, ADDR_IMMED, SIZE_BYTE, OP_MOV), |
|
| 806 |
+ PUSHOP(0xb2, ADDR_REG_EDX, SIZE_BYTE, ADDR_IMMED, SIZE_BYTE, OP_MOV), |
|
| 807 |
+ PUSHOP(0xb3, ADDR_REG_EBX, SIZE_BYTE, ADDR_IMMED, SIZE_BYTE, OP_MOV), |
|
| 808 |
+ PUSHOP(0xb4, ADDR_REG_EAX, SIZE_BYTEH, ADDR_IMMED, SIZE_BYTE, OP_MOV), |
|
| 809 |
+ PUSHOP(0xb5, ADDR_REG_ECX, SIZE_BYTEH, ADDR_IMMED, SIZE_BYTE, OP_MOV), |
|
| 810 |
+ PUSHOP(0xb6, ADDR_REG_EDX, SIZE_BYTEH, ADDR_IMMED, SIZE_BYTE, OP_MOV), |
|
| 811 |
+ PUSHOP(0xb7, ADDR_REG_EBX, SIZE_BYTEH, ADDR_IMMED, SIZE_BYTE, OP_MOV), |
|
| 812 |
+ PUSHOP(0xb8, ADDR_REG_EAX, SIZE_WD, ADDR_IMMED, SIZE_WD, OP_MOV), |
|
| 813 |
+ PUSHOP(0xb9, ADDR_REG_ECX, SIZE_WD, ADDR_IMMED, SIZE_WD, OP_MOV), |
|
| 814 |
+ PUSHOP(0xba, ADDR_REG_EDX, SIZE_WD, ADDR_IMMED, SIZE_WD, OP_MOV), |
|
| 815 |
+ PUSHOP(0xbb, ADDR_REG_EBX, SIZE_WD, ADDR_IMMED, SIZE_WD, OP_MOV), |
|
| 816 |
+ PUSHOP(0xbc, ADDR_REG_ESP, SIZE_WD, ADDR_IMMED, SIZE_WD, OP_MOV), |
|
| 817 |
+ PUSHOP(0xbd, ADDR_REG_EBP, SIZE_WD, ADDR_IMMED, SIZE_WD, OP_MOV), |
|
| 818 |
+ PUSHOP(0xbe, ADDR_REG_ESI, SIZE_WD, ADDR_IMMED, SIZE_WD, OP_MOV), |
|
| 819 |
+ PUSHOP(0xbf, ADDR_REG_ESI, SIZE_WD, ADDR_IMMED, SIZE_WD, OP_MOV), |
|
| 820 |
+ |
|
| 821 |
+ PUSHOP(0xc0, ADDR_MRM_EXTRA_1A, SIZE_BYTE, ADDR_IMMED, SIZE_BYTE, 2), |
|
| 822 |
+ PUSHOP(0xc1, ADDR_MRM_EXTRA_1A, SIZE_WD, ADDR_IMMED, SIZE_BYTE, 2), |
|
| 823 |
+ PUSHOP(0xc2, ADDR_IMMED, SIZE_WORD, ADDR_NOADDR, SIZE_NOSIZE, OP_RETN), |
|
| 824 |
+ PUSHOP(0xc3, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_RETN), |
|
| 825 |
+ PUSHOP(0xc4, ADDR_MRM_GEN_GM, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_LES), /* FIXME: mem size is F/D */ |
|
| 826 |
+ PUSHOP(0xc5, ADDR_MRM_GEN_GM, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_LDS), /* FIXME: mem size is F/D */ |
|
| 827 |
+ PUSHOP(0xc6, ADDR_MRM_EXTRA_1A, SIZE_BYTE, ADDR_IMMED, SIZE_BYTE, 5), |
|
| 828 |
+ PUSHOP(0xc7, ADDR_MRM_EXTRA_1A, SIZE_WD, ADDR_IMMED, SIZE_WD, 5), |
|
| 829 |
+ PUSHOP(0xc8, ADDR_IMMED, SIZE_WORD, ADDR_IMMED, SIZE_BYTE, OP_ENTER), |
|
| 830 |
+ PUSHOP(0xc9, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_LEAVE), |
|
| 831 |
+ PUSHOP(0xca, ADDR_IMMED, SIZE_WORD, ADDR_NOADDR, SIZE_NOSIZE, OP_RETF), |
|
| 832 |
+ PUSHOP(0xcb, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_RETF), |
|
| 833 |
+ PUSHOP(0xcc, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_INT3), |
|
| 834 |
+ PUSHOP(0xcd, ADDR_IMMED, SIZE_BYTE, ADDR_NOADDR, SIZE_NOSIZE, OP_INT), |
|
| 835 |
+ PUSHOP(0xce, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_INTO), |
|
| 836 |
+ PUSHOP(0xcf, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_IRET), |
|
| 837 |
+ |
|
| 838 |
+ PUSHOP(0xd0, ADDR_MRM_EXTRA_1A, SIZE_BYTE, ADDR_IMPLICIT, 1, 2), |
|
| 839 |
+ PUSHOP(0xd1, ADDR_MRM_EXTRA_1A, SIZE_WD, ADDR_IMPLICIT, 1, 2), |
|
| 840 |
+ PUSHOP(0xd2, ADDR_MRM_EXTRA_1A, SIZE_BYTE, ADDR_REG_ECX, SIZE_BYTE, 2), |
|
| 841 |
+ PUSHOP(0xd3, ADDR_MRM_EXTRA_1A, SIZE_WD, ADDR_REG_ECX, SIZE_BYTE, 2), |
|
| 842 |
+ PUSHOP(0xd4, ADDR_IMMED, SIZE_BYTE, ADDR_NOADDR, SIZE_NOSIZE, OP_AAM), |
|
| 843 |
+ PUSHOP(0xd5, ADDR_IMMED, SIZE_BYTE, ADDR_NOADDR, SIZE_NOSIZE, OP_AAD), |
|
| 844 |
+ PUSHOP(0xd6, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_INVALID), |
|
| 845 |
+ PUSHOP(0xd7, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_XLAT), |
|
| 846 |
+ PUSHOP(0xd8, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_FPU), |
|
| 847 |
+ PUSHOP(0xd9, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_FPU), |
|
| 848 |
+ PUSHOP(0xda, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_FPU), |
|
| 849 |
+ PUSHOP(0xdb, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_FPU), |
|
| 850 |
+ PUSHOP(0xdc, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_FPU), |
|
| 851 |
+ PUSHOP(0xdd, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_FPU), |
|
| 852 |
+ PUSHOP(0xde, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_FPU), |
|
| 853 |
+ PUSHOP(0xdf, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_FPU), |
|
| 854 |
+ |
|
| 855 |
+ PUSHOP(0xe0, ADDR_RELJ, SIZE_BYTE, ADDR_NOADDR, SIZE_NOSIZE, OP_LOOPNE), |
|
| 856 |
+ PUSHOP(0xe1, ADDR_RELJ, SIZE_BYTE, ADDR_NOADDR, SIZE_NOSIZE, OP_LOOPE), |
|
| 857 |
+ PUSHOP(0xe2, ADDR_RELJ, SIZE_BYTE, ADDR_NOADDR, SIZE_NOSIZE, OP_LOOP), |
|
| 858 |
+ PUSHOP(0xe3, ADDR_RELJ, SIZE_BYTE, ADDR_NOADDR, SIZE_NOSIZE, OP_LOOPNE), |
|
| 859 |
+ PUSHOP(0xe4, ADDR_REG_EAX, SIZE_BYTE, ADDR_IMMED, SIZE_BYTE, OP_IN), |
|
| 860 |
+ PUSHOP(0xe5, ADDR_REG_EAX, SIZE_WD, ADDR_IMMED, SIZE_BYTE, OP_IN), |
|
| 861 |
+ PUSHOP(0xe6, ADDR_IMMED, SIZE_BYTE, ADDR_REG_EAX, SIZE_BYTE, OP_OUT), |
|
| 862 |
+ PUSHOP(0xe7, ADDR_IMMED, SIZE_BYTE, ADDR_REG_EAX, SIZE_WD, OP_OUT), |
|
| 863 |
+ PUSHOP(0xe8, ADDR_RELJ, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_CALL), |
|
| 864 |
+ PUSHOP(0xe9, ADDR_RELJ, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_JMP), |
|
| 865 |
+ PUSHOP(0xea, ADDR_IMMED, SIZE_DF, ADDR_NOADDR, SIZE_NOSIZE, OP_JMP), |
|
| 866 |
+ PUSHOP(0xeb, ADDR_RELJ, SIZE_BYTE, ADDR_NOADDR, SIZE_NOSIZE, OP_JMP), |
|
| 867 |
+ PUSHOP(0xec, ADDR_REG_EAX, SIZE_BYTE, ADDR_REG_EDX, SIZE_WORD, OP_IN), |
|
| 868 |
+ PUSHOP(0xed, ADDR_REG_EAX, SIZE_WD, ADDR_REG_EDX, SIZE_WORD, OP_IN), |
|
| 869 |
+ PUSHOP(0xee, ADDR_REG_EDX, SIZE_WORD, ADDR_REG_EAX, SIZE_BYTE, OP_OUT), |
|
| 870 |
+ PUSHOP(0xef, ADDR_REG_EDX, SIZE_WORD, ADDR_REG_EAX, SIZE_WD, OP_OUT), |
|
| 871 |
+ |
|
| 872 |
+ PUSHOP(0xf0, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_PREFIX_LOCK), |
|
| 873 |
+ PUSHOP(0xf1, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_INVALID), |
|
| 874 |
+ PUSHOP(0xf2, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_PREFIX_REPNE), |
|
| 875 |
+ PUSHOP(0xf3, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_PREFIX_REPE), |
|
| 876 |
+ PUSHOP(0xf4, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_HLT), |
|
| 877 |
+ PUSHOP(0xf5, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_CMC), |
|
| 878 |
+ PUSHOP(0xf6, ADDR_MRM_EXTRA_1A, SIZE_BYTE, ADDR_IMMED, SIZE_BYTE, 6), |
|
| 879 |
+ PUSHOP(0xf7, ADDR_MRM_EXTRA_1A, SIZE_WD, ADDR_IMMED, SIZE_WD, 6), |
|
| 880 |
+ PUSHOP(0xf8, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_CLC), |
|
| 881 |
+ PUSHOP(0xf9, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_STC), |
|
| 882 |
+ PUSHOP(0xfa, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_CLI), |
|
| 883 |
+ PUSHOP(0xfb, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_STI), |
|
| 884 |
+ PUSHOP(0xfc, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_CLD), |
|
| 885 |
+ PUSHOP(0xfd, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_STD), |
|
| 886 |
+ PUSHOP(0xfe, ADDR_MRM_EXTRA_1A, SIZE_BYTE, ADDR_NOADDR, SIZE_NOSIZE, 3), |
|
| 887 |
+ PUSHOP(0xff, ADDR_MRM_EXTRA_1A, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, 4), |
|
| 888 |
+},{ /* 222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222 */
|
|
| 889 |
+ PUSHOP(0x00, ADDR_MRM_EXTRA_1A, SIZE_WORD, ADDR_NOADDR, SIZE_NOSIZE, 7), |
|
| 890 |
+ PUSHOP(0x01, ADDR_MRM_EXTRA_1A_M, SIZE_BYTE, ADDR_NOADDR, SIZE_NOSIZE, 26), /* FIXME: SMSW/LMSW Mw/R[vw] (0f0120,0f0130,660f0120,660f0130,0f01e0,0f01f0,660f01e0,660f01f0) not handled */ |
|
| 891 |
+ PUSHOP(0x02, ADDR_MRM_GEN_GE, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_LAR), /* FIXME: ssize is always W */ |
|
| 892 |
+ PUSHOP(0x03, ADDR_MRM_GEN_GE, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_LSL), /* FIXME: ssize is always W */ |
|
| 893 |
+ PUSHOP(0x04, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_INVALID), |
|
| 894 |
+ PUSHOP(0x05, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_SYSCALL), |
|
| 895 |
+ PUSHOP(0x06, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_CLTS), |
|
| 896 |
+ PUSHOP(0x07, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_SYSRET), |
|
| 897 |
+ PUSHOP(0x08, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_INVD), |
|
| 898 |
+ PUSHOP(0x09, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_WBINVD), |
|
| 899 |
+ PUSHOP(0x0a, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_INVALID), |
|
| 900 |
+ PUSHOP(0x0b, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UD2), |
|
| 901 |
+ PUSHOP(0x0c, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_INVALID), |
|
| 902 |
+ PUSHOP(0x0d, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 903 |
+ PUSHOP(0x0e, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_INVALID), |
|
| 904 |
+ PUSHOP(0x0f, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_INVALID), |
|
| 905 |
+ |
|
| 906 |
+ PUSHOP(0x10, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 907 |
+ PUSHOP(0x11, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 908 |
+ PUSHOP(0x12, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 909 |
+ PUSHOP(0x13, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 910 |
+ PUSHOP(0x14, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 911 |
+ PUSHOP(0x15, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 912 |
+ PUSHOP(0x16, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 913 |
+ PUSHOP(0x17, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 914 |
+ PUSHOP(0x18, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 915 |
+ PUSHOP(0x19, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_INVALID), |
|
| 916 |
+ PUSHOP(0x1a, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_INVALID), |
|
| 917 |
+ PUSHOP(0x1b, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_INVALID), |
|
| 918 |
+ PUSHOP(0x1c, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_INVALID), |
|
| 919 |
+ PUSHOP(0x1d, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_INVALID), |
|
| 920 |
+ PUSHOP(0x1e, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_INVALID), |
|
| 921 |
+ PUSHOP(0x1f, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 922 |
+ |
|
| 923 |
+ PUSHOP(0x20, ADDR_MRM_GEN_RC, SIZE_DWORD, ADDR_NOADDR, SIZE_NOSIZE, OP_MOV), |
|
| 924 |
+ PUSHOP(0x21, ADDR_MRM_GEN_RD, SIZE_DWORD, ADDR_NOADDR, SIZE_NOSIZE, OP_MOV), |
|
| 925 |
+ PUSHOP(0x22, ADDR_MRM_GEN_CR, SIZE_DWORD, ADDR_NOADDR, SIZE_NOSIZE, OP_MOV), |
|
| 926 |
+ PUSHOP(0x23, ADDR_MRM_GEN_DR, SIZE_DWORD, ADDR_NOADDR, SIZE_NOSIZE, OP_MOV), |
|
| 927 |
+ PUSHOP(0x24, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_INVALID), |
|
| 928 |
+ PUSHOP(0x25, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_INVALID), |
|
| 929 |
+ PUSHOP(0x26, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_INVALID), |
|
| 930 |
+ PUSHOP(0x27, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_INVALID), |
|
| 931 |
+ PUSHOP(0x28, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 932 |
+ PUSHOP(0x29, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 933 |
+ PUSHOP(0x2a, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 934 |
+ PUSHOP(0x2b, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 935 |
+ PUSHOP(0x2c, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 936 |
+ PUSHOP(0x2d, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 937 |
+ PUSHOP(0x2e, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 938 |
+ PUSHOP(0x2f, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 939 |
+ |
|
| 940 |
+ PUSHOP(0x30, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_WRMSR), |
|
| 941 |
+ PUSHOP(0x31, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_RDTSC), |
|
| 942 |
+ PUSHOP(0x32, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_RDMSR), |
|
| 943 |
+ PUSHOP(0x33, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_RDPMC), |
|
| 944 |
+ PUSHOP(0x34, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_SYSENTER), |
|
| 945 |
+ PUSHOP(0x35, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_SYSEXIT), |
|
| 946 |
+ PUSHOP(0x36, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_INVALID), |
|
| 947 |
+ PUSHOP(0x37, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_INVALID), |
|
| 948 |
+ PUSHOP(0x38, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), /* 3byte escape */ |
|
| 949 |
+ PUSHOP(0x39, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_INVALID), |
|
| 950 |
+ PUSHOP(0x3a, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), /* 3byte escape */ |
|
| 951 |
+ PUSHOP(0x3b, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_INVALID), |
|
| 952 |
+ PUSHOP(0x3c, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_INVALID), |
|
| 953 |
+ PUSHOP(0x3d, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_INVALID), |
|
| 954 |
+ PUSHOP(0x3e, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_INVALID), |
|
| 955 |
+ PUSHOP(0x3f, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_INVALID), |
|
| 956 |
+ |
|
| 957 |
+ PUSHOP(0x40, ADDR_MRM_GEN_GE, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_CMOVO), |
|
| 958 |
+ PUSHOP(0x41, ADDR_MRM_GEN_GE, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_CMOVNO), |
|
| 959 |
+ PUSHOP(0x42, ADDR_MRM_GEN_GE, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_CMOVC), |
|
| 960 |
+ PUSHOP(0x43, ADDR_MRM_GEN_GE, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_CMOVNC), |
|
| 961 |
+ PUSHOP(0x44, ADDR_MRM_GEN_GE, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_CMOVZ), |
|
| 962 |
+ PUSHOP(0x45, ADDR_MRM_GEN_GE, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_CMOVNZ), |
|
| 963 |
+ PUSHOP(0x46, ADDR_MRM_GEN_GE, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_CMOVBE), |
|
| 964 |
+ PUSHOP(0x47, ADDR_MRM_GEN_GE, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_CMOVA), |
|
| 965 |
+ PUSHOP(0x48, ADDR_MRM_GEN_GE, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_CMOVS), |
|
| 966 |
+ PUSHOP(0x49, ADDR_MRM_GEN_GE, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_CMOVNS), |
|
| 967 |
+ PUSHOP(0x4a, ADDR_MRM_GEN_GE, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_CMOVP), |
|
| 968 |
+ PUSHOP(0x4b, ADDR_MRM_GEN_GE, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_CMOVNP), |
|
| 969 |
+ PUSHOP(0x4c, ADDR_MRM_GEN_GE, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_CMOVL), |
|
| 970 |
+ PUSHOP(0x4d, ADDR_MRM_GEN_GE, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_CMOVGE), |
|
| 971 |
+ PUSHOP(0x4e, ADDR_MRM_GEN_GE, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_CMOVLE), |
|
| 972 |
+ PUSHOP(0x4f, ADDR_MRM_GEN_GE, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_CMOVG), |
|
| 973 |
+ |
|
| 974 |
+ PUSHOP(0x50, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 975 |
+ PUSHOP(0x51, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 976 |
+ PUSHOP(0x52, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 977 |
+ PUSHOP(0x53, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 978 |
+ PUSHOP(0x54, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 979 |
+ PUSHOP(0x55, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 980 |
+ PUSHOP(0x56, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 981 |
+ PUSHOP(0x57, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 982 |
+ PUSHOP(0x58, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 983 |
+ PUSHOP(0x59, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 984 |
+ PUSHOP(0x5a, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 985 |
+ PUSHOP(0x5b, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 986 |
+ PUSHOP(0x5c, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 987 |
+ PUSHOP(0x5d, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 988 |
+ PUSHOP(0x5e, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 989 |
+ PUSHOP(0x5f, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 990 |
+ |
|
| 991 |
+ PUSHOP(0x60, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 992 |
+ PUSHOP(0x61, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 993 |
+ PUSHOP(0x62, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 994 |
+ PUSHOP(0x63, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 995 |
+ PUSHOP(0x64, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 996 |
+ PUSHOP(0x65, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 997 |
+ PUSHOP(0x66, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 998 |
+ PUSHOP(0x67, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 999 |
+ PUSHOP(0x68, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 1000 |
+ PUSHOP(0x69, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 1001 |
+ PUSHOP(0x6a, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 1002 |
+ PUSHOP(0x6b, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 1003 |
+ PUSHOP(0x6c, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 1004 |
+ PUSHOP(0x6d, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 1005 |
+ PUSHOP(0x6e, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 1006 |
+ PUSHOP(0x6f, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 1007 |
+ |
|
| 1008 |
+ PUSHOP(0x70, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 1009 |
+ PUSHOP(0x71, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 1010 |
+ PUSHOP(0x72, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 1011 |
+ PUSHOP(0x73, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 1012 |
+ PUSHOP(0x74, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 1013 |
+ PUSHOP(0x75, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 1014 |
+ PUSHOP(0x76, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 1015 |
+ PUSHOP(0x77, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 1016 |
+ PUSHOP(0x78, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 1017 |
+ PUSHOP(0x79, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 1018 |
+ PUSHOP(0x7a, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_INVALID), |
|
| 1019 |
+ PUSHOP(0x7b, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_INVALID), |
|
| 1020 |
+ PUSHOP(0x7c, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 1021 |
+ PUSHOP(0x7d, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 1022 |
+ PUSHOP(0x7e, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 1023 |
+ PUSHOP(0x7f, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 1024 |
+ |
|
| 1025 |
+ PUSHOP(0x80, ADDR_RELJ, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_JO), |
|
| 1026 |
+ PUSHOP(0x81, ADDR_RELJ, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_JNO), |
|
| 1027 |
+ PUSHOP(0x82, ADDR_RELJ, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_JC), |
|
| 1028 |
+ PUSHOP(0x83, ADDR_RELJ, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_JNC), |
|
| 1029 |
+ PUSHOP(0x84, ADDR_RELJ, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_JZ), |
|
| 1030 |
+ PUSHOP(0x85, ADDR_RELJ, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_JNZ), |
|
| 1031 |
+ PUSHOP(0x86, ADDR_RELJ, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_JBE), |
|
| 1032 |
+ PUSHOP(0x87, ADDR_RELJ, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_JA), |
|
| 1033 |
+ PUSHOP(0x88, ADDR_RELJ, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_JS), |
|
| 1034 |
+ PUSHOP(0x89, ADDR_RELJ, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_JNS), |
|
| 1035 |
+ PUSHOP(0x8a, ADDR_RELJ, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_JP), |
|
| 1036 |
+ PUSHOP(0x8b, ADDR_RELJ, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_JNP), |
|
| 1037 |
+ PUSHOP(0x8c, ADDR_RELJ, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_JL), |
|
| 1038 |
+ PUSHOP(0x8d, ADDR_RELJ, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_JGE), |
|
| 1039 |
+ PUSHOP(0x8e, ADDR_RELJ, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_JLE), |
|
| 1040 |
+ PUSHOP(0x8f, ADDR_RELJ, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_JG), |
|
| 1041 |
+ |
|
| 1042 |
+ PUSHOP(0x90, ADDR_MRM_EXTRA_1A, SIZE_BYTE, ADDR_NOADDR, SIZE_NOSIZE, 8), |
|
| 1043 |
+ PUSHOP(0x91, ADDR_MRM_EXTRA_1A, SIZE_BYTE, ADDR_NOADDR, SIZE_NOSIZE, 9), |
|
| 1044 |
+ PUSHOP(0x92, ADDR_MRM_EXTRA_1A, SIZE_BYTE, ADDR_NOADDR, SIZE_NOSIZE, 10), |
|
| 1045 |
+ PUSHOP(0x93, ADDR_MRM_EXTRA_1A, SIZE_BYTE, ADDR_NOADDR, SIZE_NOSIZE, 11), |
|
| 1046 |
+ PUSHOP(0x94, ADDR_MRM_EXTRA_1A, SIZE_BYTE, ADDR_NOADDR, SIZE_NOSIZE, 12), |
|
| 1047 |
+ PUSHOP(0x95, ADDR_MRM_EXTRA_1A, SIZE_BYTE, ADDR_NOADDR, SIZE_NOSIZE, 13), |
|
| 1048 |
+ PUSHOP(0x96, ADDR_MRM_EXTRA_1A, SIZE_BYTE, ADDR_NOADDR, SIZE_NOSIZE, 14), |
|
| 1049 |
+ PUSHOP(0x97, ADDR_MRM_EXTRA_1A, SIZE_BYTE, ADDR_NOADDR, SIZE_NOSIZE, 15), |
|
| 1050 |
+ PUSHOP(0x98, ADDR_MRM_EXTRA_1A, SIZE_BYTE, ADDR_NOADDR, SIZE_NOSIZE, 16), |
|
| 1051 |
+ PUSHOP(0x99, ADDR_MRM_EXTRA_1A, SIZE_BYTE, ADDR_NOADDR, SIZE_NOSIZE, 17), |
|
| 1052 |
+ PUSHOP(0x9a, ADDR_MRM_EXTRA_1A, SIZE_BYTE, ADDR_NOADDR, SIZE_NOSIZE, 18), |
|
| 1053 |
+ PUSHOP(0x9b, ADDR_MRM_EXTRA_1A, SIZE_BYTE, ADDR_NOADDR, SIZE_NOSIZE, 19), |
|
| 1054 |
+ PUSHOP(0x9c, ADDR_MRM_EXTRA_1A, SIZE_BYTE, ADDR_NOADDR, SIZE_NOSIZE, 20), |
|
| 1055 |
+ PUSHOP(0x9d, ADDR_MRM_EXTRA_1A, SIZE_BYTE, ADDR_NOADDR, SIZE_NOSIZE, 21), |
|
| 1056 |
+ PUSHOP(0x9e, ADDR_MRM_EXTRA_1A, SIZE_BYTE, ADDR_NOADDR, SIZE_NOSIZE, 22), |
|
| 1057 |
+ PUSHOP(0x9f, ADDR_MRM_EXTRA_1A, SIZE_BYTE, ADDR_NOADDR, SIZE_NOSIZE, 23), |
|
| 1058 |
+ |
|
| 1059 |
+ PUSHOP(0xa0, ADDR_REG_FS, SIZE_WORD, ADDR_NOADDR, SIZE_NOSIZE, OP_PUSH), |
|
| 1060 |
+ PUSHOP(0xa1, ADDR_REG_FS, SIZE_WORD, ADDR_NOADDR, SIZE_NOSIZE, OP_POP), |
|
| 1061 |
+ PUSHOP(0xa2, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_CPUID), |
|
| 1062 |
+ PUSHOP(0xa3, ADDR_MRM_GEN_EG, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_BT), |
|
| 1063 |
+ PUSHOP(0xa4, ADDR_MRM_GEN_EG, SIZE_WD, ADDR_IMMED, SIZE_BYTE, OP_SHLD), |
|
| 1064 |
+ PUSHOP(0xa5, ADDR_MRM_GEN_EG, SIZE_WD, ADDR_REG_ECX, SIZE_BYTE, OP_SHLD), |
|
| 1065 |
+ PUSHOP(0xa6, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_INVALID), |
|
| 1066 |
+ PUSHOP(0xa7, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_INVALID), |
|
| 1067 |
+ PUSHOP(0xa8, ADDR_REG_GS, SIZE_WORD, ADDR_NOADDR, SIZE_NOSIZE, OP_PUSH), |
|
| 1068 |
+ PUSHOP(0xa9, ADDR_REG_GS, SIZE_WORD, ADDR_NOADDR, SIZE_NOSIZE, OP_POP), |
|
| 1069 |
+ PUSHOP(0xaa, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_RSM), |
|
| 1070 |
+ PUSHOP(0xab, ADDR_MRM_GEN_EG, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_BTS), |
|
| 1071 |
+ PUSHOP(0xac, ADDR_MRM_GEN_EG, SIZE_WD, ADDR_IMMED, SIZE_BYTE, OP_SHRD), |
|
| 1072 |
+ PUSHOP(0xad, ADDR_MRM_GEN_EG, SIZE_WD, ADDR_REG_ECX, SIZE_BYTE, OP_SHRD), |
|
| 1073 |
+ PUSHOP(0xae, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 1074 |
+ PUSHOP(0xaf, ADDR_MRM_GEN_GE, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_IMUL), |
|
| 1075 |
+ |
|
| 1076 |
+ PUSHOP(0xb0, ADDR_MRM_GEN_EG, SIZE_BYTE, ADDR_NOADDR, SIZE_NOSIZE, OP_CMPXCHG), |
|
| 1077 |
+ PUSHOP(0xb1, ADDR_MRM_GEN_EG, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_CMPXCHG), |
|
| 1078 |
+ PUSHOP(0xb2, ADDR_MRM_GEN_GM, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_LSS), /* FIXME: mem size is F/D */ |
|
| 1079 |
+ PUSHOP(0xb3, ADDR_MRM_GEN_EG, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_BTR), |
|
| 1080 |
+ PUSHOP(0xb4, ADDR_MRM_GEN_GM, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_LFS), /* FIXME: mem size is F/D */ |
|
| 1081 |
+ PUSHOP(0xb5, ADDR_MRM_GEN_GM, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_LGS), /* FIXME: mem size is F/D */ |
|
| 1082 |
+ PUSHOP(0xb6, ADDR_MRM_GEN_GE, SIZE_BYTE, ADDR_NOADDR, SIZE_NOSIZE, OP_MOVZX), /* FIXME: dsize is always B */ |
|
| 1083 |
+ PUSHOP(0xb7, ADDR_MRM_GEN_GE, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_MOVZX), /* FIXME: dsize is always W */ |
|
| 1084 |
+ PUSHOP(0xb8, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_INVALID), |
|
| 1085 |
+ PUSHOP(0xb9, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 1086 |
+ PUSHOP(0xba, ADDR_MRM_EXTRA_1A, SIZE_WD, ADDR_IMMED, SIZE_BYTE, 24), |
|
| 1087 |
+ PUSHOP(0xbb, ADDR_MRM_GEN_EG, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_BTC), |
|
| 1088 |
+ PUSHOP(0xbc, ADDR_MRM_GEN_GE, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_BSF), |
|
| 1089 |
+ PUSHOP(0xbd, ADDR_MRM_GEN_GE, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_BSR), |
|
| 1090 |
+ PUSHOP(0xbe, ADDR_MRM_GEN_GE, SIZE_BYTE, ADDR_NOADDR, SIZE_NOSIZE, OP_MOVSX), /* FIXME: dsize is always B */ |
|
| 1091 |
+ PUSHOP(0xbf, ADDR_MRM_GEN_GE, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_MOVSX), /* FIXME: dsize is always W */ |
|
| 1092 |
+ |
|
| 1093 |
+ PUSHOP(0xc0, ADDR_MRM_GEN_EG, SIZE_BYTE, ADDR_NOADDR, SIZE_NOSIZE, OP_XADD), |
|
| 1094 |
+ PUSHOP(0xc1, ADDR_MRM_GEN_EG, SIZE_WD, ADDR_NOADDR, SIZE_NOSIZE, OP_XADD), |
|
| 1095 |
+ PUSHOP(0xc2, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 1096 |
+ PUSHOP(0xc3, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 1097 |
+ PUSHOP(0xc4, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 1098 |
+ PUSHOP(0xc5, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 1099 |
+ PUSHOP(0xc6, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 1100 |
+ PUSHOP(0xc7, ADDR_MRM_EXTRA_1A_M, SIZE_DWORD, ADDR_NOADDR, SIZE_NOSIZE, 25), |
|
| 1101 |
+ PUSHOP(0xc8, ADDR_REG_EAX, SIZE_DWORD, ADDR_NOADDR, SIZE_NOSIZE, OP_BSWAP), |
|
| 1102 |
+ PUSHOP(0xc9, ADDR_REG_ECX, SIZE_DWORD, ADDR_NOADDR, SIZE_NOSIZE, OP_BSWAP), |
|
| 1103 |
+ PUSHOP(0xca, ADDR_REG_EDX, SIZE_DWORD, ADDR_NOADDR, SIZE_NOSIZE, OP_BSWAP), |
|
| 1104 |
+ PUSHOP(0xcb, ADDR_REG_EBX, SIZE_DWORD, ADDR_NOADDR, SIZE_NOSIZE, OP_BSWAP), |
|
| 1105 |
+ PUSHOP(0xcc, ADDR_REG_ESP, SIZE_DWORD, ADDR_NOADDR, SIZE_NOSIZE, OP_BSWAP), |
|
| 1106 |
+ PUSHOP(0xcd, ADDR_REG_EBP, SIZE_DWORD, ADDR_NOADDR, SIZE_NOSIZE, OP_BSWAP), |
|
| 1107 |
+ PUSHOP(0xce, ADDR_REG_ESI, SIZE_DWORD, ADDR_NOADDR, SIZE_NOSIZE, OP_BSWAP), |
|
| 1108 |
+ PUSHOP(0xcf, ADDR_REG_EDI, SIZE_DWORD, ADDR_NOADDR, SIZE_NOSIZE, OP_BSWAP), |
|
| 1109 |
+ |
|
| 1110 |
+ PUSHOP(0xd0, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 1111 |
+ PUSHOP(0xd1, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 1112 |
+ PUSHOP(0xd2, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 1113 |
+ PUSHOP(0xd3, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 1114 |
+ PUSHOP(0xd4, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 1115 |
+ PUSHOP(0xd5, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 1116 |
+ PUSHOP(0xd6, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 1117 |
+ PUSHOP(0xd7, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 1118 |
+ PUSHOP(0xd8, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 1119 |
+ PUSHOP(0xd9, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 1120 |
+ PUSHOP(0xda, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 1121 |
+ PUSHOP(0xdb, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 1122 |
+ PUSHOP(0xdc, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 1123 |
+ PUSHOP(0xdd, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 1124 |
+ PUSHOP(0xde, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 1125 |
+ PUSHOP(0xdf, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 1126 |
+ |
|
| 1127 |
+ PUSHOP(0xe0, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 1128 |
+ PUSHOP(0xe1, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 1129 |
+ PUSHOP(0xe2, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 1130 |
+ PUSHOP(0xe3, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 1131 |
+ PUSHOP(0xe4, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 1132 |
+ PUSHOP(0xe5, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 1133 |
+ PUSHOP(0xe6, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 1134 |
+ PUSHOP(0xe7, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 1135 |
+ PUSHOP(0xe8, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 1136 |
+ PUSHOP(0xe9, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 1137 |
+ PUSHOP(0xea, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 1138 |
+ PUSHOP(0xeb, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 1139 |
+ PUSHOP(0xec, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 1140 |
+ PUSHOP(0xed, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 1141 |
+ PUSHOP(0xee, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 1142 |
+ PUSHOP(0xef, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 1143 |
+ |
|
| 1144 |
+ PUSHOP(0xf0, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 1145 |
+ PUSHOP(0xf1, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 1146 |
+ PUSHOP(0xf2, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 1147 |
+ PUSHOP(0xf3, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 1148 |
+ PUSHOP(0xf4, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 1149 |
+ PUSHOP(0xf5, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 1150 |
+ PUSHOP(0xf6, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 1151 |
+ PUSHOP(0xf7, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 1152 |
+ PUSHOP(0xf8, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 1153 |
+ PUSHOP(0xf9, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 1154 |
+ PUSHOP(0xfa, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 1155 |
+ PUSHOP(0xfb, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 1156 |
+ PUSHOP(0xfc, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 1157 |
+ PUSHOP(0xfd, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 1158 |
+ PUSHOP(0xfe, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_UNSUP), |
|
| 1159 |
+ PUSHOP(0xff, ADDR_NOADDR, SIZE_NOSIZE, ADDR_NOADDR, SIZE_NOSIZE, OP_INVALID), |
|
| 1160 |
+ |
|
| 1161 |
+}}; |
|
| 1162 |
+ |
|
| 1163 |
+ |
|
| 1164 |
+static const char *dis_size[] = {"byte", "word", "dword", "fword", "qword", "tword", "acab"};
|
|
| 1165 |
+ |
|
| 1166 |
+static const char *x86regs[] = {
|
|
| 1167 |
+ "eax","ecx","edx","ebx","esp","ebp","esi","edi", |
|
| 1168 |
+ "ax","cx","dx","bx","sp","bp","si","di", |
|
| 1169 |
+ "ah","ch","dh","bh","al","cl","dl","bl", |
|
| 1170 |
+ "es","cs","ss","ds","fs","gs", |
|
| 1171 |
+ "cr0", "cr1 (rsvd)", "cr2", "cr3", "cr4", "cr5 (rsvd)", "cr6 (rsvd)", "cr7 (rsvd)", |
|
| 1172 |
+ "dr0", "dr1", "dr2", "dr3", "dr4 (rsvd)", "dr5 (rsvd)", "dr6", "dr7", |
|
| 1173 |
+ "st(0)", "st(1)", "st(2)", "st(3)", "st(4)", "st(5)", "st(6)", "st(7)", |
|
| 1174 |
+ "" |
|
| 1175 |
+}; |
|
| 1176 |
+ |
|
| 1177 |
+ |
|
| 1178 |
+static void spam_x86(struct DISASMED *s, char *hr) {
|
|
| 1179 |
+ int i; |
|
| 1180 |
+ char comma[2]={'\0','\0'};
|
|
| 1181 |
+ |
|
| 1182 |
+ strcpy(hr, mnemonic[s->real_op]); |
|
| 1183 |
+ |
|
| 1184 |
+ for (i=0; i<3; i++) {
|
|
| 1185 |
+ switch(s->args[i].access) {
|
|
| 1186 |
+ case ACCESS_IMM: |
|
| 1187 |
+ sprintf(hr, "%s%s %x", hr, comma, s->args[i].arg.d); |
|
| 1188 |
+ break; |
|
| 1189 |
+ case ACCESS_REL: |
|
| 1190 |
+ if (s->args[i].arg.rd >=0) |
|
| 1191 |
+ sprintf(hr, "%s%s %x", hr, comma, s->args[i].arg.d); |
|
| 1192 |
+ else |
|
| 1193 |
+ sprintf(hr, "%s%s -%x", hr, comma, -s->args[i].arg.rd); |
|
| 1194 |
+ break; |
|
| 1195 |
+ case ACCESS_REG: |
|
| 1196 |
+ sprintf(hr, "%s%s %s", hr, comma, x86regs[s->args[i].reg]); |
|
| 1197 |
+ break; |
|
| 1198 |
+ case ACCESS_MEM: {
|
|
| 1199 |
+ const char *gotstuff=""; |
|
| 1200 |
+ sprintf(hr, "%s%s %s ptr ", hr, comma, dis_size[s->args[i].size]); |
|
| 1201 |
+ if(s->segment) sprintf(hr, "%s%s:", hr, x86regs[s->segment]); |
|
| 1202 |
+ strcat(hr, "["); |
|
| 1203 |
+ if(s->args[i].arg.marg.r1!=REG_INVALID) {
|
|
| 1204 |
+ switch(s->args[i].arg.marg.scale) {
|
|
| 1205 |
+ case 1: |
|
| 1206 |
+ sprintf(hr, "%s%s", hr, x86regs[s->args[i].arg.marg.r1]); |
|
| 1207 |
+ gotstuff="+"; |
|
| 1208 |
+ break; |
|
| 1209 |
+ case 0: |
|
| 1210 |
+ break; |
|
| 1211 |
+ default: |
|
| 1212 |
+ sprintf(hr, "%s%s*%d", hr, x86regs[s->args[i].arg.marg.r1],s->args[i].arg.marg.scale); |
|
| 1213 |
+ gotstuff="+"; |
|
| 1214 |
+ } |
|
| 1215 |
+ } |
|
| 1216 |
+ if(s->args[i].arg.marg.r2!=REG_INVALID) {
|
|
| 1217 |
+ sprintf(hr, "%s%s%s", hr, gotstuff, x86regs[s->args[i].arg.marg.r2]); |
|
| 1218 |
+ gotstuff="+"; |
|
| 1219 |
+ } |
|
| 1220 |
+ if(s->args[i].arg.marg.disp) {
|
|
| 1221 |
+ if(*gotstuff=='+' && s->args[i].arg.marg.disp<0) |
|
| 1222 |
+ sprintf(hr, "%s-%x", hr, -s->args[i].arg.marg.disp); |
|
| 1223 |
+ else |
|
| 1224 |
+ sprintf(hr, "%s%s%x", hr, gotstuff, s->args[i].arg.marg.disp); |
|
| 1225 |
+ } |
|
| 1226 |
+ strcat(hr, "]"); |
|
| 1227 |
+ } |
|
| 1228 |
+ } |
|
| 1229 |
+ comma[0]=','; |
|
| 1230 |
+ } |
|
| 1231 |
+} |
|
| 1232 |
+ |
|
| 1233 |
+ |
|
| 1234 |
+#define INVALIDATE {s->table_op=OP_INVALID; s->state=STATE_ERROR; goto disasm_failed;}
|
|
| 1235 |
+#define GETBYTE(X) if(len--) {X=*command; command++;} else INVALIDATE;
|
|
| 1236 |
+#define GETSIZE(X) (x86ops[table][s->table_op].X!=SIZE_WD?x86ops[table][s->table_op].X:((s->opsize)?SIZE_WORD:SIZE_DWORD)) |
|
| 1237 |
+ |
|
| 1238 |
+ |
|
| 1239 |
+uint8_t *disasm_x86(uint8_t *command, unsigned int len, struct DISASMED *s) {
|
|
| 1240 |
+ unsigned int reversed=0, i; |
|
| 1241 |
+ uint8_t b; |
|
| 1242 |
+ unsigned int table = 0; |
|
| 1243 |
+ memset(s, 0, sizeof(struct DISASMED)); |
|
| 1244 |
+ s->state = STATE_GETOP; |
|
| 1245 |
+ |
|
| 1246 |
+ while(1) {
|
|
| 1247 |
+ switch (s->state) {
|
|
| 1248 |
+ case STATE_GETOP: |
|
| 1249 |
+ GETBYTE(s->table_op); |
|
| 1250 |
+ s->real_op=x86ops[table][s->table_op].op; |
|
| 1251 |
+ switch(s->real_op) {
|
|
| 1252 |
+ case OP_FPU: |
|
| 1253 |
+ s->state = STATE_DECODEX87; |
|
| 1254 |
+ break; |
|
| 1255 |
+ case OP_2BYTE: |
|
| 1256 |
+ table=1; |
|
| 1257 |
+ break; |
|
| 1258 |
+ case OP_PREFIX_OPSIZE: |
|
| 1259 |
+ s->opsize=1; /* FIXME: check double prefixes */ |
|
| 1260 |
+ break; |
|
| 1261 |
+ case OP_PREFIX_ADDRSIZE: |
|
| 1262 |
+ s->adsize=1; /* FIXME: check double prefixes */ |
|
| 1263 |
+ break; |
|
| 1264 |
+ case OP_PREFIX_SEGMENT: |
|
| 1265 |
+ assert(x86ops[table][s->table_op].dmethod>=ADDR_REG_ES && x86ops[table][s->table_op].dmethod<=ADDR_REG_GS); |
|
| 1266 |
+ s->segment = regmap[SIZE_WORD][x86ops[table][s->table_op].dmethod]; |
|
| 1267 |
+ break; |
|
| 1268 |
+ default: |
|
| 1269 |
+ s->state = STATE_CHECKDTYPE; |
|
| 1270 |
+ } |
|
| 1271 |
+ continue; |
|
| 1272 |
+ |
|
| 1273 |
+ case STATE_DECODEX87: {
|
|
| 1274 |
+ uint8_t mod; |
|
| 1275 |
+ uint8_t rm; |
|
| 1276 |
+ uint8_t rop; |
|
| 1277 |
+ uint8_t scale; |
|
| 1278 |
+ uint8_t base; |
|
| 1279 |
+ uint8_t index; |
|
| 1280 |
+ |
|
| 1281 |
+ table = s->table_op - 0xd8; |
|
| 1282 |
+ assert(table<8); |
|
| 1283 |
+ GETBYTE(rm); |
|
| 1284 |
+ if (rm>=0xc0) { /* ST */
|
|
| 1285 |
+ rm&=0x3f; |
|
| 1286 |
+ if ((s->real_op=x87_st[table][rm].op)==OP_INVALID) INVALIDATE; |
|
| 1287 |
+ switch(x87_st[table][rm].args) {
|
|
| 1288 |
+ case X87_S: |
|
| 1289 |
+ reversed = 1; |
|
| 1290 |
+ case X87_R: |
|
| 1291 |
+ s->args[reversed^1].access = ACCESS_REG; |
|
| 1292 |
+ s->args[reversed^1].reg = REG_ST0; |
|
| 1293 |
+ case X87_ONE: |
|
| 1294 |
+ s->args[reversed].access = ACCESS_REG; |
|
| 1295 |
+ s->args[reversed].reg = REG_ST0 + (rm&7); |
|
| 1296 |
+ break; |
|
| 1297 |
+ case X87_NONE: |
|
| 1298 |
+ break; |
|
| 1299 |
+ default: |
|
| 1300 |
+ assert("Bad data in x87_st"==0);
|
|
| 1301 |
+ } |
|
| 1302 |
+ s->state = STATE_FINALIZE; |
|
| 1303 |
+ continue; |
|
| 1304 |
+ } |
|
| 1305 |
+ |
|
| 1306 |
+ /* MRM */ |
|
| 1307 |
+ mod=rm>>6; |
|
| 1308 |
+ rop=(rm>>3)&7; |
|
| 1309 |
+ rm&=7; |
|
| 1310 |
+ |
|
| 1311 |
+ if ((s->real_op=x87_mrm[table][rop].op)==OP_INVALID) INVALIDATE; |
|
| 1312 |
+ s->args[0].size = x87_mrm[table][rop].size; |
|
| 1313 |
+ s->args[0].access = ACCESS_MEM; |
|
| 1314 |
+ |
|
| 1315 |
+ if(!s->adsize) {
|
|
| 1316 |
+ if (rm==4) {
|
|
| 1317 |
+ GETBYTE(base); |
|
| 1318 |
+ scale=base>>6; |
|
| 1319 |
+ index=(base>>3)&7; |
|
| 1320 |
+ base&=7; |
|
| 1321 |
+ |
|
| 1322 |
+ s->args[0].arg.marg.scale = 1<<scale; |
|
| 1323 |
+ if((s->args[0].arg.marg.r2=mrm_regmap[SIZED][base])==REG_EBP && mod==0) {
|
|
| 1324 |
+ s->args[0].arg.marg.r2=REG_INVALID; |
|
| 1325 |
+ mod=2; |
|
| 1326 |
+ } |
|
| 1327 |
+ if((s->args[0].arg.marg.r1=mrm_regmap[SIZED][index])==REG_ESP) {
|
|
| 1328 |
+ s->args[0].arg.marg.r1=s->args[0].arg.marg.r2; |
|
| 1329 |
+ s->args[0].arg.marg.scale = (s->args[0].arg.marg.r2!=REG_INVALID); |
|
| 1330 |
+ s->args[0].arg.marg.r2=REG_INVALID; |
|
| 1331 |
+ } |
|
| 1332 |
+ } else {
|
|
| 1333 |
+ if (mod==0 && rm==5) {
|
|
| 1334 |
+ mod=2; |
|
| 1335 |
+ s->args[0].arg.marg.r1=REG_INVALID; |
|
| 1336 |
+ } else {
|
|
| 1337 |
+ s->args[0].arg.marg.scale=1; |
|
| 1338 |
+ s->args[0].arg.marg.r1=mrm_regmap[SIZED][rm]; |
|
| 1339 |
+ } |
|
| 1340 |
+ s->args[0].arg.marg.r2=REG_INVALID; |
|
| 1341 |
+ } |
|
| 1342 |
+ if(mod==2) mod+=mod; |
|
| 1343 |
+ for (i=0; i<mod; i++) {
|
|
| 1344 |
+ GETBYTE(b); |
|
| 1345 |
+ s->args[0].arg.marg.disp+=b<<(i*8); |
|
| 1346 |
+ /* FIXME: signextend to dword */ |
|
| 1347 |
+ } |
|
| 1348 |
+ } else {
|
|
| 1349 |
+ if (mod==0 && rm==6) {
|
|
| 1350 |
+ s->args[0].arg.marg.r1=REG_INVALID; |
|
| 1351 |
+ mod=2; |
|
| 1352 |
+ } else {
|
|
| 1353 |
+ s->args[0].arg.marg.scale=1; |
|
| 1354 |
+ s->args[0].arg.marg.r1=mrm_regmapw[rm].r1; |
|
| 1355 |
+ s->args[0].arg.marg.r2=mrm_regmapw[rm].r2; |
|
| 1356 |
+ } |
|
| 1357 |
+ for (i=0; i<mod; i++) {
|
|
| 1358 |
+ GETBYTE(b); |
|
| 1359 |
+ s->args[0].arg.marg.disp+=b<<(i*8); |
|
| 1360 |
+ /* FIXME: signextend to dword */ |
|
| 1361 |
+ } |
|
| 1362 |
+ } |
|
| 1363 |
+ s->state = STATE_FINALIZE; |
|
| 1364 |
+ break; |
|
| 1365 |
+ } |
|
| 1366 |
+ |
|
| 1367 |
+ case STATE_CHECKDTYPE: |
|
| 1368 |
+ switch(x86ops[table][s->table_op].dmethod) {
|
|
| 1369 |
+ case ADDR_REG_FS: case ADDR_REG_GS: |
|
| 1370 |
+ /* FIXME: does this exist? */ |
|
| 1371 |
+ case ADDR_REG_ES: case ADDR_REG_CS: case ADDR_REG_SS: case ADDR_REG_DS: |
|
| 1372 |
+ assert(x86ops[table][s->table_op].dsize==SIZE_WORD); |
|
| 1373 |
+ case ADDR_REG_ESP: case ADDR_REG_EBP: case ADDR_REG_ESI: case ADDR_REG_EDI: |
|
| 1374 |
+ assert(x86ops[table][s->table_op].dsize!=SIZE_BYTE && x86ops[table][s->table_op].dsize!=SIZE_BYTEH); |
|
| 1375 |
+ case ADDR_REG_EAX: case ADDR_REG_ECX: case ADDR_REG_EDX: case ADDR_REG_EBX: |
|
| 1376 |
+ assert(x86ops[table][s->table_op].dsize<=SIZE_WD); |
|
| 1377 |
+ s->args[0].access = ACCESS_REG; |
|
| 1378 |
+ s->args[0].reg = regmap[GETSIZE(dsize)][x86ops[table][s->table_op].dmethod]; |
|
| 1379 |
+ s->state = STATE_CHECKSTYPE; |
|
| 1380 |
+ continue; |
|
| 1381 |
+ |
|
| 1382 |
+ case ADDR_NOADDR: |
|
| 1383 |
+ if (x86ops[table][s->table_op].dsize!=SIZE_NOSIZE) {
|
|
| 1384 |
+ assert(x86ops[table][s->table_op].dsize==SIZE_WD); |
|
| 1385 |
+ s->real_op+=(s->opsize!=0); |
|
| 1386 |
+ } |
|
| 1387 |
+ s->args[0].access = ACCESS_NOARG; |
|
| 1388 |
+ s->state = STATE_FINALIZE; |
|
| 1389 |
+ continue; |
|
| 1390 |
+ |
|
| 1391 |
+ case ADDR_RELJ: |
|
| 1392 |
+ case ADDR_IMMED: {
|
|
| 1393 |
+ uint8_t sz; |
|
| 1394 |
+ s->args[0].access = x86ops[table][s->table_op].dmethod-ADDR_IMMED+ACCESS_IMM; |
|
| 1395 |
+ assert(x86ops[table][s->table_op].dsize<SIZE_NOSIZE && s->opsize<2); |
|
| 1396 |
+ sz=sizemap[x86ops[table][s->table_op].dsize][s->opsize]; |
|
| 1397 |
+ assert(sz!=255); |
|
| 1398 |
+ s->args[0].size = sz>>1; /* FIXME: size does matter - 6aff vs 666aff :( */ |
|
| 1399 |
+ for (i=0; i<sz; i++) {
|
|
| 1400 |
+ GETBYTE(b); |
|
| 1401 |
+ s->args[0].arg.q+=b<<(i*8); |
|
| 1402 |
+ } |
|
| 1403 |
+ if (x86ops[table][s->table_op].dmethod==ADDR_RELJ) {
|
|
| 1404 |
+ s->args[0].arg.q<<=((8-sz)*8); |
|
| 1405 |
+ s->args[0].arg.rq>>=((8-sz)*8); |
|
| 1406 |
+ } |
|
| 1407 |
+ s->state = STATE_CHECKSTYPE; |
|
| 1408 |
+ continue; |
|
| 1409 |
+ } |
|
| 1410 |
+ |
|
| 1411 |
+ case ADDR_MRM_GEN_GE: |
|
| 1412 |
+ case ADDR_MRM_GEN_GM: |
|
| 1413 |
+ case ADDR_MRM_GEN_SE: |
|
| 1414 |
+ case ADDR_MRM_GEN_CR: |
|
| 1415 |
+ case ADDR_MRM_GEN_DR: |
|
| 1416 |
+ reversed = 1; |
|
| 1417 |
+ |
|
| 1418 |
+ case ADDR_MRM_GEN_EG: |
|
| 1419 |
+ case ADDR_MRM_GEN_ES: |
|
| 1420 |
+ case ADDR_MRM_EXTRA_1A: |
|
| 1421 |
+ case ADDR_MRM_EXTRA_1A_M: |
|
| 1422 |
+ case ADDR_MRM_GEN_RC: |
|
| 1423 |
+ case ADDR_MRM_GEN_RD: {
|
|
| 1424 |
+ uint8_t mod; |
|
| 1425 |
+ uint8_t rm; |
|
| 1426 |
+ uint8_t rop; |
|
| 1427 |
+ uint8_t scale; |
|
| 1428 |
+ uint8_t base; |
|
| 1429 |
+ uint8_t index; |
|
| 1430 |
+ int64_t shiftme=0; |
|
| 1431 |
+ const uint8_t (*p)[8]; |
|
| 1432 |
+ |
|
| 1433 |
+ GETBYTE(rm); |
|
| 1434 |
+ mod=rm>>6; |
|
| 1435 |
+ rop=(rm>>3)&7; |
|
| 1436 |
+ rm&=7; |
|
| 1437 |
+ |
|
| 1438 |
+ switch(x86ops[table][s->table_op].dmethod) {
|
|
| 1439 |
+ case ADDR_MRM_GEN_RC: |
|
| 1440 |
+ case ADDR_MRM_GEN_CR: |
|
| 1441 |
+ p = mrm_cregmap; |
|
| 1442 |
+ mod = 3; |
|
| 1443 |
+ break; |
|
| 1444 |
+ case ADDR_MRM_GEN_RD: |
|
| 1445 |
+ case ADDR_MRM_GEN_DR: |
|
| 1446 |
+ p = mrm_dregmap; |
|
| 1447 |
+ mod = 3; |
|
| 1448 |
+ break; |
|
| 1449 |
+ case ADDR_MRM_GEN_SE: |
|
| 1450 |
+ case ADDR_MRM_GEN_ES: |
|
| 1451 |
+ p = mrm_sregmap; /* FIXME: CS invalid? */ |
|
| 1452 |
+ break; |
|
| 1453 |
+ default: |
|
| 1454 |
+ p = mrm_regmap; |
|
| 1455 |
+ } |
|
| 1456 |
+ |
|
| 1457 |
+ s->args[reversed].size = SIZEB; |
|
| 1458 |
+ switch (x86ops[table][s->table_op].dsize) {
|
|
| 1459 |
+ case SIZE_DWORD: |
|
| 1460 |
+ s->args[reversed].size=SIZED; |
|
| 1461 |
+ break; |
|
| 1462 |
+ case SIZE_WD: |
|
| 1463 |
+ s->args[reversed].size+=(s->opsize==0); |
|
| 1464 |
+ case SIZE_WORD: |
|
| 1465 |
+ s->args[reversed].size++; |
|
| 1466 |
+ case SIZE_BYTE: |
|
| 1467 |
+ break; |
|
| 1468 |
+ default: |
|
| 1469 |
+ assert("Bad size"==0);
|
|
| 1470 |
+ } |
|
| 1471 |
+ |
|
| 1472 |
+ s->args[reversed^1].access = ACCESS_REG; |
|
| 1473 |
+ if ((s->args[reversed^1].reg = p[s->args[reversed].size][rop]) == REG_INVALID) INVALIDATE; |
|
| 1474 |
+ |
|
| 1475 |
+ if(mod==3) {
|
|
| 1476 |
+ if(x86ops[table][s->table_op].dmethod==ADDR_MRM_GEN_GM || x86ops[table][s->table_op].dmethod==ADDR_MRM_EXTRA_1A_M) INVALIDATE; |
|
| 1477 |
+ s->args[reversed].access = ACCESS_REG; |
|
| 1478 |
+ s->args[reversed].reg = mrm_regmap[s->args[reversed].size][rm]; |
|
| 1479 |
+ |
|
| 1480 |
+ if(x86ops[table][s->table_op].dmethod==ADDR_MRM_EXTRA_1A) {
|
|
| 1481 |
+ uint8_t opcache = s->real_op; |
|
| 1482 |
+ assert(opcache<(sizeof(extra_1a)/sizeof(extra_1a[0][0]))); |
|
| 1483 |
+ s->args[0].size+=extra_1a[opcache][rop].addsz; |
|
| 1484 |
+ if((s->real_op=extra_1a[opcache][rop].op)==OP_INVALID) INVALIDATE; |
|
| 1485 |
+ s->args[1].access=ACCESS_NOARG; |
|
| 1486 |
+ if (opcache==6 && rop!=0) {
|
|
| 1487 |
+ /* f6-f7 - GRP3 - handle test E[bv],I[bv] vs the rest */ |
|
| 1488 |
+ s->state = STATE_FINALIZE; |
|
| 1489 |
+ continue; |
|
| 1490 |
+ } |
|
| 1491 |
+ } else s->cur++; |
|
| 1492 |
+ s->state = STATE_CHECKSTYPE; |
|
| 1493 |
+ continue; |
|
| 1494 |
+ } |
|
| 1495 |
+ |
|
| 1496 |
+ s->args[reversed].access = ACCESS_MEM; |
|
| 1497 |
+ |
|
| 1498 |
+ if(!s->adsize) {
|
|
| 1499 |
+ if (rm==4) {
|
|
| 1500 |
+ GETBYTE(base); |
|
| 1501 |
+ scale=base>>6; |
|
| 1502 |
+ index=(base>>3)&7; |
|
| 1503 |
+ base&=7; |
|
| 1504 |
+ |
|
| 1505 |
+ s->args[reversed].arg.marg.scale = 1<<scale; |
|
| 1506 |
+ if((s->args[reversed].arg.marg.r2=mrm_regmap[SIZED][base])==REG_EBP && mod==0) {
|
|
| 1507 |
+ s->args[reversed].arg.marg.r2=REG_INVALID; |
|
| 1508 |
+ mod=2; |
|
| 1509 |
+ } |
|
| 1510 |
+ if((s->args[reversed].arg.marg.r1=mrm_regmap[SIZED][index])==REG_ESP) {
|
|
| 1511 |
+ s->args[reversed].arg.marg.r1=s->args[reversed].arg.marg.r2; |
|
| 1512 |
+ s->args[reversed].arg.marg.scale = (s->args[reversed].arg.marg.r2!=REG_INVALID); |
|
| 1513 |
+ s->args[reversed].arg.marg.r2=REG_INVALID; |
|
| 1514 |
+ } |
|
| 1515 |
+ } else {
|
|
| 1516 |
+ if (mod==0 && rm==5) {
|
|
| 1517 |
+ mod=2; |
|
| 1518 |
+ s->args[reversed].arg.marg.r1=REG_INVALID; |
|
| 1519 |
+ } else {
|
|
| 1520 |
+ s->args[reversed].arg.marg.scale=1; |
|
| 1521 |
+ s->args[reversed].arg.marg.r1=mrm_regmap[SIZED][rm]; |
|
| 1522 |
+ } |
|
| 1523 |
+ s->args[reversed].arg.marg.r2=REG_INVALID; |
|
| 1524 |
+ } |
|
| 1525 |
+ if(mod==2) mod+=mod; |
|
| 1526 |
+ for (i=0; i<mod; i++) {
|
|
| 1527 |
+ GETBYTE(b); |
|
| 1528 |
+ shiftme+=b<<(i*8); |
|
| 1529 |
+ } |
|
| 1530 |
+ shiftme<<=((8-mod)*8); |
|
| 1531 |
+ s->args[reversed].arg.marg.disp=shiftme>>((8-mod)*8); |
|
| 1532 |
+ } else {
|
|
| 1533 |
+ if (mod==0 && rm==6) {
|
|
| 1534 |
+ s->args[reversed].arg.marg.r1=REG_INVALID; |
|
| 1535 |
+ mod=2; |
|
| 1536 |
+ } else {
|
|
| 1537 |
+ s->args[reversed].arg.marg.scale=1; |
|
| 1538 |
+ s->args[reversed].arg.marg.r1=mrm_regmapw[rm].r1; |
|
| 1539 |
+ s->args[reversed].arg.marg.r2=mrm_regmapw[rm].r2; |
|
| 1540 |
+ } |
|
| 1541 |
+ for (i=0; i<mod; i++) {
|
|
| 1542 |
+ GETBYTE(b); |
|
| 1543 |
+ shiftme+=b<<(i*8); |
|
| 1544 |
+ } |
|
| 1545 |
+ shiftme<<=((8-mod)*8); |
|
| 1546 |
+ s->args[reversed].arg.marg.disp=shiftme>>((8-mod)*8); |
|
| 1547 |
+ } |
|
| 1548 |
+ if(x86ops[table][s->table_op].dmethod==ADDR_MRM_EXTRA_1A || x86ops[table][s->table_op].dmethod==ADDR_MRM_EXTRA_1A_M) {
|
|
| 1549 |
+ uint8_t opcache = s->real_op; |
|
| 1550 |
+ assert(opcache<(sizeof(extra_1a)/sizeof(extra_1a[0][0]))); |
|
| 1551 |
+ s->args[0].size+=extra_1a[opcache][rop].addsz; |
|
| 1552 |
+ if ((s->real_op=extra_1a[opcache][rop].op)==OP_INVALID) INVALIDATE; |
|
| 1553 |
+ s->args[1].access=ACCESS_NOARG; |
|
| 1554 |
+ if (opcache==6 && rop!=0) {
|
|
| 1555 |
+ /* f6-f7 - GRP3 - handle test E[bv],I[bv] vs the rest */ |
|
| 1556 |
+ s->state = STATE_FINALIZE; |
|
| 1557 |
+ continue; |
|
| 1558 |
+ } |
|
| 1559 |
+ } else s->cur++; |
|
| 1560 |
+ s->state = STATE_CHECKSTYPE; |
|
| 1561 |
+ continue; |
|
| 1562 |
+ } |
|
| 1563 |
+ |
|
| 1564 |
+ case ADDR_OFFSET: {
|
|
| 1565 |
+ uint8_t sz; |
|
| 1566 |
+ s->args[0].access = ACCESS_MEM; |
|
| 1567 |
+ assert((x86ops[table][s->table_op].dsize==SIZE_BYTE || x86ops[table][s->table_op].dsize==SIZE_WD) && s->adsize<2); |
|
| 1568 |
+ sz=sizemap[SIZE_WD][s->adsize]; |
|
| 1569 |
+ assert(sz!=255); |
|
| 1570 |
+ assert(s->opsize<2); |
|
| 1571 |
+ s->args[0].size=sizemap[x86ops[table][s->table_op].dsize][s->opsize]; |
|
| 1572 |
+ assert(s->args[0].size!=255); |
|
| 1573 |
+ s->args[0].size>>=1; |
|
| 1574 |
+ s->args[0].arg.marg.r1=REG_INVALID; |
|
| 1575 |
+ s->args[0].arg.marg.r2=REG_INVALID; |
|
| 1576 |
+ for (i=0; i<sz; i++) {
|
|
| 1577 |
+ GETBYTE(b); |
|
| 1578 |
+ s->args[0].arg.marg.disp+=b<<(i*8); |
|
| 1579 |
+ } |
|
| 1580 |
+ s->state = STATE_CHECKSTYPE; |
|
| 1581 |
+ continue; |
|
| 1582 |
+ } |
|
| 1583 |
+ |
|
| 1584 |
+ default: |
|
| 1585 |
+ assert("BAD DST METHOD"==0);
|
|
| 1586 |
+ } |
|
| 1587 |
+ |
|
| 1588 |
+ |
|
| 1589 |
+ case STATE_CHECKSTYPE: |
|
| 1590 |
+ s->cur++; |
|
| 1591 |
+ switch(x86ops[table][s->table_op].smethod) {
|
|
| 1592 |
+ case ADDR_NOADDR: |
|
| 1593 |
+ s->state = STATE_FINALIZE; |
|
| 1594 |
+ continue; |
|
| 1595 |
+ |
|
| 1596 |
+ case ADDR_IMMED: {
|
|
| 1597 |
+ uint8_t sz; |
|
| 1598 |
+ s->args[s->cur].access = ACCESS_IMM; |
|
| 1599 |
+ assert((x86ops[table][s->table_op].ssize==SIZE_WD || x86ops[table][s->table_op].ssize==SIZE_BYTE) && s->opsize<2); |
|
| 1600 |
+ sz=sizemap[x86ops[table][s->table_op].ssize][s->opsize]; |
|
| 1601 |
+ s->args[s->cur].size = sz>>1; |
|
| 1602 |
+ for (i=0; i<sz; i++) {
|
|
| 1603 |
+ GETBYTE(b); |
|
| 1604 |
+ s->args[s->cur].arg.q+=b<<(i*8); |
|
| 1605 |
+ } |
|
| 1606 |
+ s->state = STATE_FINALIZE; |
|
| 1607 |
+ continue; |
|
| 1608 |
+ } |
|
| 1609 |
+ |
|
| 1610 |
+ case ADDR_REG_EAX: |
|
| 1611 |
+ case ADDR_REG_ECX: |
|
| 1612 |
+ case ADDR_REG_EDX: |
|
| 1613 |
+ assert(x86ops[table][s->table_op].ssize<=SIZE_WD); |
|
| 1614 |
+ s->args[s->cur].access = ACCESS_REG; |
|
| 1615 |
+ s->args[s->cur].reg = regmap[GETSIZE(ssize)][x86ops[table][s->table_op].smethod]; |
|
| 1616 |
+ s->state = STATE_FINALIZE; |
|
| 1617 |
+ continue; |
|
| 1618 |
+ |
|
| 1619 |
+ case ADDR_IMPLICIT: |
|
| 1620 |
+ s->args[s->cur].access = ACCESS_IMM; |
|
| 1621 |
+ s->args[s->cur].size = 1; |
|
| 1622 |
+ s->args[s->cur].arg.q = 1; |
|
| 1623 |
+ s->state = STATE_FINALIZE; |
|
| 1624 |
+ continue; |
|
| 1625 |
+ |
|
| 1626 |
+ case ADDR_OFFSET: {
|
|
| 1627 |
+ uint8_t sz; |
|
| 1628 |
+ s->args[1].access = ACCESS_MEM; |
|
| 1629 |
+ assert((x86ops[table][s->table_op].ssize==SIZE_BYTE || x86ops[table][s->table_op].ssize==SIZE_WD) && s->adsize<2); |
|
| 1630 |
+ sz=sizemap[SIZE_WD][s->adsize]; |
|
| 1631 |
+ assert(sz!=255); |
|
| 1632 |
+ assert(s->opsize<2); |
|
| 1633 |
+ s->args[1].size=sizemap[x86ops[table][s->table_op].ssize][s->opsize]; |
|
| 1634 |
+ assert(s->args[1].size!=255); |
|
| 1635 |
+ s->args[1].size>>=1; |
|
| 1636 |
+ s->args[1].arg.marg.r1=REG_INVALID; |
|
| 1637 |
+ s->args[1].arg.marg.r2=REG_INVALID; |
|
| 1638 |
+ for (i=0; i<sz; i++) {
|
|
| 1639 |
+ GETBYTE(b); |
|
| 1640 |
+ s->args[1].arg.marg.disp+=b<<(i*8); |
|
| 1641 |
+ } |
|
| 1642 |
+ s->state = STATE_FINALIZE; |
|
| 1643 |
+ continue; |
|
| 1644 |
+ } |
|
| 1645 |
+ |
|
| 1646 |
+ default: |
|
| 1647 |
+ assert("BAD SRC METHOD"==0);
|
|
| 1648 |
+ } |
|
| 1649 |
+ |
|
| 1650 |
+ case STATE_ERROR: |
|
| 1651 |
+ disasm_failed: |
|
| 1652 |
+ return NULL; |
|
| 1653 |
+ |
|
| 1654 |
+ case STATE_FINALIZE: |
|
| 1655 |
+ if (s->real_op==OP_INVALID) INVALIDATE; |
|
| 1656 |
+ return command; |
|
| 1657 |
+ |
|
| 1658 |
+ default: |
|
| 1659 |
+ assert("INVALID STATE"==0);
|
|
| 1660 |
+ } |
|
| 1661 |
+ } |
|
| 1662 |
+} |
|
| 1663 |
+ |
|
| 1664 |
+ |
|
| 1665 |
+void disasmbuf(uint8_t *buff, unsigned int len, int fd) {
|
|
| 1666 |
+ char hr[128]; |
|
| 1667 |
+ uint8_t *next = buff; |
|
| 1668 |
+ unsigned int counter=0; |
|
| 1669 |
+ struct DISASMED s; |
|
| 1670 |
+ |
|
| 1671 |
+ while(len && counter++<200) {
|
|
| 1672 |
+ if(!(next = disasm_x86(next, len, &s))) {
|
|
| 1673 |
+ /* TODO: invd opcode or buff over */ |
|
| 1674 |
+ return; |
|
| 1675 |
+ } |
|
| 1676 |
+ spam_x86(&s, hr); |
|
| 1677 |
+ /* TODO: save stuff here */ |
|
| 1678 |
+ len -= next-buff; |
|
| 1679 |
+ buff=next; |
|
| 1680 |
+ } |
|
| 1681 |
+ |
|
| 1682 |
+} |
|
| 1683 |
+ |
| 0 | 1684 |
new file mode 100644 |
| ... | ... |
@@ -0,0 +1,32 @@ |
| 0 |
+/* |
|
| 1 |
+ * Copyright (C) 2008 Sourcefire, Inc. |
|
| 2 |
+ * |
|
| 3 |
+ * Authors: aCaB <acab@clamav.net> |
|
| 4 |
+ * |
|
| 5 |
+ * This program is free software; you can redistribute it and/or modify |
|
| 6 |
+ * it under the terms of the GNU General Public License version 2 as |
|
| 7 |
+ * published by the Free Software Foundation. |
|
| 8 |
+ * |
|
| 9 |
+ * This program is distributed in the hope that it will be useful, |
|
| 10 |
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of |
|
| 11 |
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|
| 12 |
+ * GNU General Public License for more details. |
|
| 13 |
+ * |
|
| 14 |
+ * You should have received a copy of the GNU General Public License |
|
| 15 |
+ * along with this program; if not, write to the Free Software |
|
| 16 |
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, |
|
| 17 |
+ * MA 02110-1301, USA. |
|
| 18 |
+ */ |
|
| 19 |
+ |
|
| 20 |
+#ifndef __DISASM_H |
|
| 21 |
+#define __DISASM_H |
|
| 22 |
+ |
|
| 23 |
+#if HAVE_CONFIG_H |
|
| 24 |
+#include "clamav-config.h" |
|
| 25 |
+#endif |
|
| 26 |
+ |
|
| 27 |
+#include "others.h" |
|
| 28 |
+ |
|
| 29 |
+void disasmbuf(uint8_t *, unsigned int, int); |
|
| 30 |
+ |
|
| 31 |
+#endif |
| 0 | 32 |
new file mode 100644 |
| ... | ... |
@@ -0,0 +1,404 @@ |
| 0 |
+/* |
|
| 1 |
+ * Copyright (C) 2008 Sourcefire, Inc. |
|
| 2 |
+ * |
|
| 3 |
+ * Authors: aCaB <acab@clamav.net> |
|
| 4 |
+ * |
|
| 5 |
+ * This program is free software; you can redistribute it and/or modify |
|
| 6 |
+ * it under the terms of the GNU General Public License version 2 as |
|
| 7 |
+ * published by the Free Software Foundation. |
|
| 8 |
+ * |
|
| 9 |
+ * This program is distributed in the hope that it will be useful, |
|
| 10 |
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of |
|
| 11 |
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|
| 12 |
+ * GNU General Public License for more details. |
|
| 13 |
+ * |
|
| 14 |
+ * You should have received a copy of the GNU General Public License |
|
| 15 |
+ * along with this program; if not, write to the Free Software |
|
| 16 |
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, |
|
| 17 |
+ * MA 02110-1301, USA. |
|
| 18 |
+ */ |
|
| 19 |
+ |
|
| 20 |
+#ifndef __DISASMPRIV_H |
|
| 21 |
+#define __DISASMPRIV_H |
|
| 22 |
+ |
|
| 23 |
+#if HAVE_CONFIG_H |
|
| 24 |
+#include "clamav-config.h" |
|
| 25 |
+#endif |
|
| 26 |
+ |
|
| 27 |
+#include <stdio.h> |
|
| 28 |
+#include <string.h> |
|
| 29 |
+#include <assert.h> |
|
| 30 |
+ |
|
| 31 |
+#include "others.h" |
|
| 32 |
+ |
|
| 33 |
+enum X86OPS {
|
|
| 34 |
+ OP_INVALID, |
|
| 35 |
+ OP_AAA, |
|
| 36 |
+ OP_AAD, |
|
| 37 |
+ OP_AAM, |
|
| 38 |
+ OP_AAS, |
|
| 39 |
+ OP_ADD, |
|
| 40 |
+ OP_ADC, |
|
| 41 |
+ OP_AND, |
|
| 42 |
+ OP_ARPL, |
|
| 43 |
+ OP_BOUND, |
|
| 44 |
+ OP_BSF, |
|
| 45 |
+ OP_BSR, |
|
| 46 |
+ OP_BSWAP, |
|
| 47 |
+ OP_BT, |
|
| 48 |
+ OP_BTC, |
|
| 49 |
+ OP_BTR, |
|
| 50 |
+ OP_BTS, |
|
| 51 |
+ OP_CALL, |
|
| 52 |
+ OP_CDQ, |
|
| 53 |
+ OP_CWD, |
|
| 54 |
+ OP_CWDE, |
|
| 55 |
+ OP_CBW, |
|
| 56 |
+ OP_CLC, |
|
| 57 |
+ OP_CLD, |
|
| 58 |
+ OP_CLI, |
|
| 59 |
+ OP_CLTS, |
|
| 60 |
+ OP_CMC, |
|
| 61 |
+ OP_CMOVO, |
|
| 62 |
+ OP_CMOVNO, |
|
| 63 |
+ OP_CMOVC, |
|
| 64 |
+ OP_CMOVNC, |
|
| 65 |
+ OP_CMOVZ, |
|
| 66 |
+ OP_CMOVNZ, |
|
| 67 |
+ OP_CMOVBE, |
|
| 68 |
+ OP_CMOVA, |
|
| 69 |
+ OP_CMOVS, |
|
| 70 |
+ OP_CMOVNS, |
|
| 71 |
+ OP_CMOVP, |
|
| 72 |
+ OP_CMOVNP, |
|
| 73 |
+ OP_CMOVL, |
|
| 74 |
+ OP_CMOVGE, |
|
| 75 |
+ OP_CMOVLE, |
|
| 76 |
+ OP_CMOVG, |
|
| 77 |
+ OP_CMP, |
|
| 78 |
+ OP_CMPSD, |
|
| 79 |
+ OP_CMPSW, |
|
| 80 |
+ OP_CMPSB, |
|
| 81 |
+ OP_CMPXCHG, |
|
| 82 |
+ OP_CMPXCHG8B, |
|
| 83 |
+ OP_CPUID, |
|
| 84 |
+ OP_DAA, |
|
| 85 |
+ OP_DAS, |
|
| 86 |
+ OP_DEC, |
|
| 87 |
+ OP_DIV, |
|
| 88 |
+ OP_ENTER, |
|
| 89 |
+ OP_FWAIT, |
|
| 90 |
+ OP_HLT, |
|
| 91 |
+ OP_IDIV, |
|
| 92 |
+ OP_IMUL, |
|
| 93 |
+ OP_INC, |
|
| 94 |
+ OP_IN, |
|
| 95 |
+ OP_INSD, |
|
| 96 |
+ OP_INSW, |
|
| 97 |
+ OP_INSB, |
|
| 98 |
+ OP_INT, |
|
| 99 |
+ OP_INT3, |
|
| 100 |
+ OP_INTO, |
|
| 101 |
+ OP_INVD, |
|
| 102 |
+ OP_INVLPG, |
|
| 103 |
+ OP_IRET, |
|
| 104 |
+ OP_JO, |
|
| 105 |
+ OP_JNO, |
|
| 106 |
+ OP_JC, |
|
| 107 |
+ OP_JNC, |
|
| 108 |
+ OP_JZ, |
|
| 109 |
+ OP_JNZ, |
|
| 110 |
+ OP_JBE, |
|
| 111 |
+ OP_JA, |
|
| 112 |
+ OP_JS, |
|
| 113 |
+ OP_JNS, |
|
| 114 |
+ OP_JP, |
|
| 115 |
+ OP_JNP, |
|
| 116 |
+ OP_JL, |
|
| 117 |
+ OP_JGE, |
|
| 118 |
+ OP_JLE, |
|
| 119 |
+ OP_JG, |
|
| 120 |
+ OP_JMP, |
|
| 121 |
+ OP_LAHF, |
|
| 122 |
+ OP_LAR, |
|
| 123 |
+ OP_LDS, |
|
| 124 |
+ OP_LES, |
|
| 125 |
+ OP_LFS, |
|
| 126 |
+ OP_LGS, |
|
| 127 |
+ OP_LEA, |
|
| 128 |
+ OP_LEAVE, |
|
| 129 |
+ OP_LGDT, |
|
| 130 |
+ OP_LIDT, |
|
| 131 |
+ OP_LLDT, |
|
| 132 |
+ OP_PREFIX_LOCK, |
|
| 133 |
+ OP_LODSD, |
|
| 134 |
+ OP_LODSW, |
|
| 135 |
+ OP_LODSB, |
|
| 136 |
+ OP_LOOP, |
|
| 137 |
+ OP_LOOPE, |
|
| 138 |
+ OP_LOOPNE, |
|
| 139 |
+ OP_LSL, |
|
| 140 |
+ OP_LSS, |
|
| 141 |
+ OP_LTR, |
|
| 142 |
+ OP_MOV, |
|
| 143 |
+ OP_MOVSD, |
|
| 144 |
+ OP_MOVSW, |
|
| 145 |
+ OP_MOVSB, |
|
| 146 |
+ OP_MOVSX, |
|
| 147 |
+ OP_MOVZX, |
|
| 148 |
+ OP_MUL, |
|
| 149 |
+ OP_NEG, |
|
| 150 |
+ OP_NOP, |
|
| 151 |
+ OP_NOT, |
|
| 152 |
+ OP_OR, |
|
| 153 |
+ OP_OUT, |
|
| 154 |
+ OP_OUTSD, |
|
| 155 |
+ OP_OUTSW, |
|
| 156 |
+ OP_OUTSB, |
|
| 157 |
+ OP_PUSH, |
|
| 158 |
+ OP_PUSHAD, |
|
| 159 |
+ OP_PUSHA, |
|
| 160 |
+ OP_PUSHFD, |
|
| 161 |
+ OP_PUSHF, |
|
| 162 |
+ OP_POP, |
|
| 163 |
+ OP_POPAD, |
|
| 164 |
+ OP_POPFD, |
|
| 165 |
+ OP_POPF, |
|
| 166 |
+ OP_RCL, |
|
| 167 |
+ OP_RCR, |
|
| 168 |
+ OP_RDMSR, |
|
| 169 |
+ OP_RDPMC, |
|
| 170 |
+ OP_RDTSC, |
|
| 171 |
+ OP_PREFIX_REPE, |
|
| 172 |
+ OP_PREFIX_REPNE, |
|
| 173 |
+ OP_RETF, |
|
| 174 |
+ OP_RETN, |
|
| 175 |
+ OP_ROL, |
|
| 176 |
+ OP_ROR, |
|
| 177 |
+ OP_RSM, |
|
| 178 |
+ OP_SAHF, |
|
| 179 |
+ OP_SAR, |
|
| 180 |
+ OP_SBB, |
|
| 181 |
+ OP_SCASD, |
|
| 182 |
+ OP_SCASW, |
|
| 183 |
+ OP_SCASB, |
|
| 184 |
+ OP_SETO, |
|
| 185 |
+ OP_SETNO, |
|
| 186 |
+ OP_SETC, |
|
| 187 |
+ OP_SETNC, |
|
| 188 |
+ OP_SETZ, |
|
| 189 |
+ OP_SETNZ, |
|
| 190 |
+ OP_SETBE, |
|
| 191 |
+ OP_SETA, |
|
| 192 |
+ OP_SETS, |
|
| 193 |
+ OP_SETNS, |
|
| 194 |
+ OP_SETP, |
|
| 195 |
+ OP_SETNP, |
|
| 196 |
+ OP_SETL, |
|
| 197 |
+ OP_SETGE, |
|
| 198 |
+ OP_SETLE, |
|
| 199 |
+ OP_SETG, |
|
| 200 |
+ OP_SGDT, |
|
| 201 |
+ OP_SIDT, |
|
| 202 |
+ OP_SHL, |
|
| 203 |
+ OP_SHLD, |
|
| 204 |
+ OP_SHR, |
|
| 205 |
+ OP_SHRD, |
|
| 206 |
+ OP_SLDT, |
|
| 207 |
+ OP_STOSD, |
|
| 208 |
+ OP_STOSW, |
|
| 209 |
+ OP_STOSB, |
|
| 210 |
+ OP_STR, |
|
| 211 |
+ OP_STC, |
|
| 212 |
+ OP_STD, |
|
| 213 |
+ OP_STI, |
|
| 214 |
+ OP_SUB, |
|
| 215 |
+ OP_SYSCALL, |
|
| 216 |
+ OP_SYSENTER, |
|
| 217 |
+ OP_SYSEXIT, |
|
| 218 |
+ OP_SYSRET, |
|
| 219 |
+ OP_TEST, |
|
| 220 |
+ OP_UD2, |
|
| 221 |
+ OP_VERR, |
|
| 222 |
+ OP_VERRW, |
|
| 223 |
+ OP_WBINVD, |
|
| 224 |
+ OP_WRMSR, |
|
| 225 |
+ OP_XADD, |
|
| 226 |
+ OP_XCHG, |
|
| 227 |
+ OP_XLAT, |
|
| 228 |
+ OP_XOR, |
|
| 229 |
+ OP_PREFIX_OPSIZE, |
|
| 230 |
+ OP_PREFIX_ADDRSIZE, |
|
| 231 |
+ OP_PREFIX_SEGMENT, |
|
| 232 |
+ OP_2BYTE, |
|
| 233 |
+ |
|
| 234 |
+ OP_FPU, |
|
| 235 |
+ |
|
| 236 |
+ OP_F2XM1, |
|
| 237 |
+ OP_FABS, |
|
| 238 |
+ OP_FADD, |
|
| 239 |
+ OP_FADDP, |
|
| 240 |
+ OP_FBLD, |
|
| 241 |
+ OP_FBSTP, |
|
| 242 |
+ OP_FCHS, |
|
| 243 |
+ OP_FCLEX, |
|
| 244 |
+ OP_FCMOVB, |
|
| 245 |
+ OP_FCMOVBE, |
|
| 246 |
+ OP_FCMOVE, |
|
| 247 |
+ OP_FCMOVNB, |
|
| 248 |
+ OP_FCMOVNBE, |
|
| 249 |
+ OP_FCMOVNE, |
|
| 250 |
+ OP_FCMOVNU, |
|
| 251 |
+ OP_FCMOVU, |
|
| 252 |
+ OP_FCOM, |
|
| 253 |
+ OP_FCOMI, |
|
| 254 |
+ OP_FCOMIP, |
|
| 255 |
+ OP_FCOMP, |
|
| 256 |
+ OP_FCOMPP, |
|
| 257 |
+ OP_FCOS, |
|
| 258 |
+ OP_FDECSTP, |
|
| 259 |
+ OP_FDIV, |
|
| 260 |
+ OP_FDIVP, |
|
| 261 |
+ OP_FDIVR, |
|
| 262 |
+ OP_FDIVRP, |
|
| 263 |
+ OP_FFREE, |
|
| 264 |
+ OP_FIADD, |
|
| 265 |
+ OP_FICOM, |
|
| 266 |
+ OP_FICOMP, |
|
| 267 |
+ OP_FIDIV, |
|
| 268 |
+ OP_FIDIVR, |
|
| 269 |
+ OP_FILD, |
|
| 270 |
+ OP_FIMUL, |
|
| 271 |
+ OP_FINCSTP, |
|
| 272 |
+ OP_FINIT, |
|
| 273 |
+ OP_FIST, |
|
| 274 |
+ OP_FISTP, |
|
| 275 |
+ OP_FISTTP, |
|
| 276 |
+ OP_FISUB, |
|
| 277 |
+ OP_FISUBR, |
|
| 278 |
+ OP_FLD, |
|
| 279 |
+ OP_FLD1, |
|
| 280 |
+ OP_FLDCW, |
|
| 281 |
+ OP_FLDENV, |
|
| 282 |
+ OP_FLDL2E, |
|
| 283 |
+ OP_FLDL2T, |
|
| 284 |
+ OP_FLDLG2, |
|
| 285 |
+ OP_FLDLN2, |
|
| 286 |
+ OP_FLDPI, |
|
| 287 |
+ OP_FLDZ, |
|
| 288 |
+ OP_FMUL, |
|
| 289 |
+ OP_FMULP, |
|
| 290 |
+ OP_FNOP, |
|
| 291 |
+ OP_FPATAN, |
|
| 292 |
+ OP_FPREM, |
|
| 293 |
+ OP_FPREM1, |
|
| 294 |
+ OP_FPTAN, |
|
| 295 |
+ OP_FRNDINT, |
|
| 296 |
+ OP_FRSTOR, |
|
| 297 |
+ OP_FSCALE, |
|
| 298 |
+ OP_FSIN, |
|
| 299 |
+ OP_FSINCOS, |
|
| 300 |
+ OP_FSQRT, |
|
| 301 |
+ OP_FSAVE, |
|
| 302 |
+ OP_FST, |
|
| 303 |
+ OP_FSTCW, |
|
| 304 |
+ OP_FSTENV, |
|
| 305 |
+ OP_FSTP, |
|
| 306 |
+ OP_FSTSW, |
|
| 307 |
+ OP_FSUB, |
|
| 308 |
+ OP_FSUBP, |
|
| 309 |
+ OP_FSUBR, |
|
| 310 |
+ OP_FSUBRP, |
|
| 311 |
+ OP_FTST, |
|
| 312 |
+ OP_FUCOM, |
|
| 313 |
+ OP_FUCOMI, |
|
| 314 |
+ OP_FUCOMIP, |
|
| 315 |
+ OP_FUCOMP, |
|
| 316 |
+ OP_FUCOMPP, |
|
| 317 |
+ OP_FXAM, |
|
| 318 |
+ OP_FXCH, |
|
| 319 |
+ OP_FXTRACT, |
|
| 320 |
+ OP_FYL2X, |
|
| 321 |
+ OP_FYL2XP1 |
|
| 322 |
+}; |
|
| 323 |
+ |
|
| 324 |
+ |
|
| 325 |
+enum DIS_STATE {
|
|
| 326 |
+ STATE_GETOP, |
|
| 327 |
+ STATE_CHECKDTYPE, |
|
| 328 |
+ STATE_CHECKSTYPE, |
|
| 329 |
+ STATE_DECODEX87, |
|
| 330 |
+ STATE_FINALIZE, |
|
| 331 |
+ STATE_COMPLETE, |
|
| 332 |
+ STATE_ERROR |
|
| 333 |
+}; |
|
| 334 |
+ |
|
| 335 |
+enum DIS_ACCESS {
|
|
| 336 |
+ ACCESS_NOARG, /* arg not present */ |
|
| 337 |
+ ACCESS_IMM, /* immediate */ |
|
| 338 |
+ ACCESS_REL, /* +/- immediate */ |
|
| 339 |
+ ACCESS_REG, /* register */ |
|
| 340 |
+ ACCESS_MEM /* [something] */ |
|
| 341 |
+}; |
|
| 342 |
+ |
|
| 343 |
+enum DIS_SIZE { /* for mem access, immediate and relative */
|
|
| 344 |
+ SIZEB, |
|
| 345 |
+ SIZEW, |
|
| 346 |
+ SIZED, |
|
| 347 |
+ SIZEF, |
|
| 348 |
+ SIZEQ, |
|
| 349 |
+ SIZET, |
|
| 350 |
+ SIZEPTR |
|
| 351 |
+}; |
|
| 352 |
+ |
|
| 353 |
+ |
|
| 354 |
+enum X86REGS {
|
|
| 355 |
+ REG_EAX, REG_ECX, REG_EDX, REG_EBX, REG_ESP, REG_EBP, REG_ESI, REG_EDI, |
|
| 356 |
+ REG_AX, REG_CX, REG_DX, REG_BX, REG_SP, REG_BP, REG_SI, REG_DI, |
|
| 357 |
+ REG_AH, REG_CH, REG_DH, REG_BH, REG_AL, REG_CL, REG_DL, REG_BL, |
|
| 358 |
+ REG_ES, REG_CS, REG_SS, REG_DS, REG_FS, REG_GS, |
|
| 359 |
+ REG_CR0, REG_CR1, REG_CR2, REG_CR3, REG_CR4, REG_CR5, REG_CR6, REG_CR7, |
|
| 360 |
+ REG_DR0, REG_DR1, REG_DR2, REG_DR3, REG_DR4, REG_DR5, REG_DR6, REG_DR7, |
|
| 361 |
+ REG_ST0, REG_ST1, REG_ST2, REG_ST3, REG_ST4, REG_ST5, REG_ST6, REG_ST7, |
|
| 362 |
+ REG_INVALID |
|
| 363 |
+}; |
|
| 364 |
+ |
|
| 365 |
+ |
|
| 366 |
+struct DIS_ARGS {
|
|
| 367 |
+ enum DIS_ACCESS access; |
|
| 368 |
+ enum DIS_SIZE size; |
|
| 369 |
+ enum X86REGS reg; |
|
| 370 |
+ union {
|
|
| 371 |
+ uint8_t b; |
|
| 372 |
+ int8_t rb; |
|
| 373 |
+ uint16_t w; |
|
| 374 |
+ int16_t rw; |
|
| 375 |
+ uint32_t d; |
|
| 376 |
+ int32_t rd; |
|
| 377 |
+ /* uint48_t f; FIXME */ |
|
| 378 |
+ uint64_t q; |
|
| 379 |
+ int64_t rq; |
|
| 380 |
+ struct {
|
|
| 381 |
+ enum X86REGS r1; /* scaled */ |
|
| 382 |
+ enum X86REGS r2; /* added */ |
|
| 383 |
+ uint8_t scale; /* r1 multiplier */ |
|
| 384 |
+ int32_t disp; |
|
| 385 |
+ } marg; |
|
| 386 |
+ } arg; |
|
| 387 |
+}; |
|
| 388 |
+ |
|
| 389 |
+ |
|
| 390 |
+/* FIXME: pack this thing and make macroes to access it in different compilers */ |
|
| 391 |
+struct DISASMED {
|
|
| 392 |
+ uint16_t table_op; |
|
| 393 |
+ uint16_t real_op; |
|
| 394 |
+ enum DIS_STATE state; |
|
| 395 |
+ uint32_t opsize; |
|
| 396 |
+ uint32_t adsize; |
|
| 397 |
+ uint32_t segment; |
|
| 398 |
+ struct DIS_ARGS args[3]; |
|
| 399 |
+ uint8_t cur; |
|
| 400 |
+ uint8_t padding[40]; /* FIXME: for future versions */ |
|
| 401 |
+}; |
|
| 402 |
+ |
|
| 403 |
+#endif |