@@ -1,3 +1,7 @@

+Thu May 13 23:40:11 EEST 2010 (edwin)

+-------------------------------------

+ * libclamav/c++/llvm: Update to LLVM 2.7 release.

+

 Thu May 13 23:35:55 EEST 2010 (edwin)

 -------------------------------------

  * libclamav/bytecode*, unit_tests: add new unit tests for bytecode API and fix bugs.

@@ -388,7 +388,6 @@ endif

 # If REQUIRES_RTTI=1 is specified then don't disable run-time type id.

 ifneq ($(REQUIRES_RTTI), 1)

   CXX.Flags += -fno-rtti

-  CXXFLAGS += -fno-rtti

 endif

 ifdef ENABLE_COVERAGE

@@ -72,11 +72,11 @@ struct match {

 	struct re_guts *g;

 	int eflags;

 	llvm_regmatch_t *pmatch;	/* [nsub+1] (0 element unused) */

-	char *offp;		/* offsets work from here */

-	char *beginp;		/* start of string -- virtual NUL precedes */

-	char *endp;		/* end of string -- virtual NUL here */

-	char *coldp;		/* can be no match starting before here */

-	char **lastpos;		/* [nplus+1] */

+	const char *offp;		/* offsets work from here */

+	const char *beginp;		/* start of string -- virtual NUL precedes */

+	const char *endp;		/* end of string -- virtual NUL here */

+	const char *coldp;		/* can be no match starting before here */

+	const char **lastpos;		/* [nplus+1] */

 	STATEVARS;

 	states st;		/* current states */

 	states fresh;		/* states for a fresh start */

@@ -84,11 +84,14 @@ struct match {

 	states empty;		/* empty set of states */

 };

-static int matcher(struct re_guts *, char *, size_t, llvm_regmatch_t[], int);

-static char *dissect(struct match *, char *, char *, sopno, sopno);

-static char *backref(struct match *, char *, char *, sopno, sopno, sopno, int);

-static char *fast(struct match *, char *, char *, sopno, sopno);

-static char *slow(struct match *, char *, char *, sopno, sopno);

+static int matcher(struct re_guts *, const char *, size_t,

+                   llvm_regmatch_t[], int);

+static const char *dissect(struct match *, const char *, const char *, sopno,

+                           sopno);

+static const char *backref(struct match *, const char *, const char *, sopno,

+                           sopno, sopno, int);

+static const char *fast(struct match *, const char *, const char *, sopno, sopno);

+static const char *slow(struct match *, const char *, const char *, sopno, sopno);

 static states step(struct re_guts *, sopno, sopno, states, int, states);

 #define MAX_RECURSION	100

 #define	BOL	(OUT+1)

@@ -125,18 +128,19 @@ static int nope = 0;

  - matcher - the actual matching engine

  */

 static int			/* 0 success, REG_NOMATCH failure */

-matcher(struct re_guts *g, char *string, size_t nmatch, llvm_regmatch_t pmatch[],

+matcher(struct re_guts *g, const char *string, size_t nmatch,

+        llvm_regmatch_t pmatch[],

     int eflags)

 {

-	char *endp;

+	const char *endp;

 	size_t i;

 	struct match mv;

 	struct match *m = &mv;

-	char *dp;

+	const char *dp;

 	const sopno gf = g->firststate+1;	/* +1 for OEND */

 	const sopno gl = g->laststate;

-	char *start;

-	char *stop;

+	const char *start;

+	const char *stop;

 	/* simplify the situation where possible */

 	if (g->cflags&REG_NOSUB)

@@ -216,7 +220,7 @@ matcher(struct re_guts *g, char *string, size_t nmatch, llvm_regmatch_t pmatch[]

 			dp = dissect(m, m->coldp, endp, gf, gl);

 		} else {

 			if (g->nplus > 0 && m->lastpos == NULL)

-				m->lastpos = (char **)malloc((g->nplus+1) *

+				m->lastpos = (const char **)malloc((g->nplus+1) *

 							sizeof(char *));

 			if (g->nplus > 0 && m->lastpos == NULL) {

 				free(m->pmatch);

@@ -287,21 +291,22 @@ matcher(struct re_guts *g, char *string, size_t nmatch, llvm_regmatch_t pmatch[]

 /*

  - dissect - figure out what matched what, no back references

  */

-static char *			/* == stop (success) always */

-dissect(struct match *m, char *start, char *stop, sopno startst, sopno stopst)

+static const char *			/* == stop (success) always */

+dissect(struct match *m, const char *start, const char *stop, sopno startst,

+        sopno stopst)

 {

 	int i;

 	sopno ss;	/* start sop of current subRE */

 	sopno es;	/* end sop of current subRE */

-	char *sp;	/* start of string matched by it */

-	char *stp;	/* string matched by it cannot pass here */

-	char *rest;	/* start of rest of string */

-	char *tail;	/* string unmatched by rest of RE */

+	const char *sp;	/* start of string matched by it */

+	const char *stp;	/* string matched by it cannot pass here */

+	const char *rest;	/* start of rest of string */

+	const char *tail;	/* string unmatched by rest of RE */

 	sopno ssub;	/* start sop of subsubRE */

 	sopno esub;	/* end sop of subsubRE */

-	char *ssp;	/* start of string matched by subsubRE */

-	char *sep;	/* end of string matched by subsubRE */

-	char *oldssp;	/* previous ssp */

+	const char *ssp;	/* start of string matched by subsubRE */

+	const char *sep;	/* end of string matched by subsubRE */

+	const char *oldssp;	/* previous ssp */

 	AT("diss", start, stop, startst, stopst);

 	sp = start;

@@ -360,7 +365,7 @@ dissect(struct match *m, char *start, char *stop, sopno startst, sopno stopst)

 			esub = es - 1;

 			/* did innards match? */

 			if (slow(m, sp, rest, ssub, esub) != NULL) {

-				char *dp = dissect(m, sp, rest, ssub, esub);

+				const char *dp = dissect(m, sp, rest, ssub, esub);

 				(void)dp; /* avoid warning if assertions off */

 				assert(dp == rest);

 			} else		/* no */

@@ -400,7 +405,7 @@ dissect(struct match *m, char *start, char *stop, sopno startst, sopno stopst)

 			assert(sep == rest);	/* must exhaust substring */

 			assert(slow(m, ssp, sep, ssub, esub) == rest);

 			{

-				char *dp = dissect(m, ssp, sep, ssub, esub);

+				const char *dp = dissect(m, ssp, sep, ssub, esub);

 				(void)dp; /* avoid warning if assertions off */

 				assert(dp == sep);

 			}

@@ -438,7 +443,7 @@ dissect(struct match *m, char *start, char *stop, sopno startst, sopno stopst)

 					assert(OP(m->g->strip[esub]) == O_CH);

 			}

 			{

-				char *dp = dissect(m, sp, rest, ssub, esub);

+				const char *dp = dissect(m, sp, rest, ssub, esub);

 				(void)dp; /* avoid warning if assertions off */

 				assert(dp == rest);

 			}

@@ -474,17 +479,17 @@ dissect(struct match *m, char *start, char *stop, sopno startst, sopno stopst)

 /*

  - backref - figure out what matched what, figuring in back references

  */

-static char *			/* == stop (success) or NULL (failure) */

-backref(struct match *m, char *start, char *stop, sopno startst, sopno stopst,

-    sopno lev, int rec)			/* PLUS nesting level */

+static const char *			/* == stop (success) or NULL (failure) */

+backref(struct match *m, const char *start, const char *stop, sopno startst,

+        sopno stopst, sopno lev, int rec)			/* PLUS nesting level */

 {

 	int i;

 	sopno ss;	/* start sop of current subRE */

-	char *sp;	/* start of string matched by it */

+	const char *sp;	/* start of string matched by it */

 	sopno ssub;	/* start sop of subsubRE */

 	sopno esub;	/* end sop of subsubRE */

-	char *ssp;	/* start of string matched by subsubRE */

-	char *dp;

+	const char *ssp;	/* start of string matched by subsubRE */

+	const char *dp;

 	size_t len;

 	int hard;

 	sop s;

@@ -674,18 +679,19 @@ backref(struct match *m, char *start, char *stop, sopno startst, sopno stopst,

 /*

  - fast - step through the string at top speed

  */

-static char *			/* where tentative match ended, or NULL */

-fast(struct match *m, char *start, char *stop, sopno startst, sopno stopst)

+static const char *			/* where tentative match ended, or NULL */

+fast(struct match *m, const char *start, const char *stop, sopno startst,

+     sopno stopst)

 {

 	states st = m->st;

 	states fresh = m->fresh;

 	states tmp = m->tmp;

-	char *p = start;

+	const char *p = start;

 	int c = (start == m->beginp) ? OUT : *(start-1);

 	int lastc;	/* previous c */

 	int flagch;

 	int i;

-	char *coldp;	/* last p after which no match was underway */

+	const char *coldp;	/* last p after which no match was underway */

 	CLEAR(st);

 	SET1(st, startst);

@@ -758,18 +764,19 @@ fast(struct match *m, char *start, char *stop, sopno startst, sopno stopst)

 /*

  - slow - step through the string more deliberately

  */

-static char *			/* where it ended */

-slow(struct match *m, char *start, char *stop, sopno startst, sopno stopst)

+static const char *			/* where it ended */

+slow(struct match *m, const char *start, const char *stop, sopno startst,

+     sopno stopst)

 {

 	states st = m->st;

 	states empty = m->empty;

 	states tmp = m->tmp;

-	char *p = start;

+	const char *p = start;

 	int c = (start == m->beginp) ? OUT : *(start-1);

 	int lastc;	/* previous c */

 	int flagch;

 	int i;

-	char *matchp;	/* last p at which a match ended */

+	const char *matchp;	/* last p at which a match ended */

 	AT("slow", start, stop, startst, stopst);

 	CLEAR(st);

@@ -155,7 +155,7 @@ llvm_regexec(const llvm_regex_t *preg, const char *string, size_t nmatch,

 	eflags = GOODFLAGS(eflags);

 	if (g->nstates <= (long)(CHAR_BIT*sizeof(states1)) && !(eflags&REG_LARGE))

-		return(smatcher(g, (char *)string, nmatch, pmatch, eflags));

+		return(smatcher(g, string, nmatch, pmatch, eflags));

 	else

-		return(lmatcher(g, (char *)string, nmatch, pmatch, eflags));

+		return(lmatcher(g, string, nmatch, pmatch, eflags));

 }

@@ -67,6 +67,12 @@ TargetAsmBackend *createX86_64AsmBackend(const Target &, MCAssembler &);

 ///

 FunctionPass *createEmitX86CodeToMemory();

+/// createX86MaxStackAlignmentHeuristicPass - This function returns a pass

+/// which determines whether the frame pointer register should be

+/// reserved in case dynamic stack alignment is later required.

+///

+FunctionPass *createX86MaxStackAlignmentHeuristicPass();

+

 extern Target TheX86_32Target, TheX86_64Target;

 } // End llvm namespace

@@ -52,6 +52,10 @@ class X86MachineFunctionInfo : public MachineFunctionInfo {

   /// relocation models.

   unsigned GlobalBaseReg;

+  /// ReserveFP - whether the function should reserve the frame pointer

+  /// when allocating, even if there may not actually be a frame pointer used.

+  bool ReserveFP;

+

 public:

   X86MachineFunctionInfo() : ForceFramePointer(false),

                              CalleeSavedFrameSize(0),

@@ -68,7 +72,8 @@ public:

       ReturnAddrIndex(0),

       TailCallReturnAddrDelta(0),

       SRetReturnReg(0),

-      GlobalBaseReg(0) {}

+      GlobalBaseReg(0),

+      ReserveFP(false) {}

   bool getForceFramePointer() const { return ForceFramePointer;} 

   void setForceFramePointer(bool forceFP) { ForceFramePointer = forceFP; }

@@ -90,6 +95,9 @@ public:

   unsigned getGlobalBaseReg() const { return GlobalBaseReg; }

   void setGlobalBaseReg(unsigned Reg) { GlobalBaseReg = Reg; }

+

+  bool getReserveFP() const { return ReserveFP; }

+  void setReserveFP(bool reserveFP) { ReserveFP = reserveFP; }

 };

 } // End llvm namespace

@@ -1489,3 +1489,46 @@ unsigned getX86SubSuperRegister(unsigned Reg, EVT VT, bool High) {

 }

 #include "X86GenRegisterInfo.inc"

+

+namespace {

+  struct MSAH : public MachineFunctionPass {

+    static char ID;

+    MSAH() : MachineFunctionPass(&ID) {}

+

+    virtual bool runOnMachineFunction(MachineFunction &MF) {

+      const X86TargetMachine *TM =

+        static_cast<const X86TargetMachine *>(&MF.getTarget());

+      const X86RegisterInfo *X86RI = TM->getRegisterInfo();

+      MachineRegisterInfo &RI = MF.getRegInfo();

+      X86MachineFunctionInfo *FuncInfo = MF.getInfo<X86MachineFunctionInfo>();

+      unsigned StackAlignment = X86RI->getStackAlignment();

+

+      // Be over-conservative: scan over all vreg defs and find whether vector

+      // registers are used. If yes, there is a possibility that vector register

+      // will be spilled and thus require dynamic stack realignment.

+      for (unsigned RegNum = TargetRegisterInfo::FirstVirtualRegister;

+           RegNum < RI.getLastVirtReg(); ++RegNum)

+        if (RI.getRegClass(RegNum)->getAlignment() > StackAlignment) {

+          FuncInfo->setReserveFP(true);

+          return true;

+        }

+

+      // Nothing to do

+      return false;

+    }

+

+    virtual const char *getPassName() const {

+      return "X86 Maximal Stack Alignment Check";

+    }

+

+    virtual void getAnalysisUsage(AnalysisUsage &AU) const {

+      AU.setPreservesCFG();

+      MachineFunctionPass::getAnalysisUsage(AU);

+    }

+  };

+

+  char MSAH::ID = 0;

+}

+

+FunctionPass*

+llvm::createX86MaxStackAlignmentHeuristicPass() { return new MSAH(); }

@@ -352,11 +352,12 @@ def GR8 : RegisterClass<"X86", [i8],  8,

       const TargetMachine &TM = MF.getTarget();

       const TargetRegisterInfo *RI = TM.getRegisterInfo();

       const X86Subtarget &Subtarget = TM.getSubtarget<X86Subtarget>();

+      const X86MachineFunctionInfo *MFI = MF.getInfo<X86MachineFunctionInfo>();

       // Does the function dedicate RBP / EBP to being a frame ptr?

       if (!Subtarget.is64Bit())

         // In 32-mode, none of the 8-bit registers aliases EBP or ESP.

         return begin() + 8;

-      else if (RI->hasFP(MF))

+      else if (RI->hasFP(MF) || MFI->getReserveFP())

         // If so, don't allocate SPL or BPL.

         return array_endof(X86_GR8_AO_64) - 1;

       else

@@ -396,9 +397,10 @@ def GR16 : RegisterClass<"X86", [i16], 16,

       const TargetMachine &TM = MF.getTarget();

       const TargetRegisterInfo *RI = TM.getRegisterInfo();

       const X86Subtarget &Subtarget = TM.getSubtarget<X86Subtarget>();

+      const X86MachineFunctionInfo *MFI = MF.getInfo<X86MachineFunctionInfo>();

       if (Subtarget.is64Bit()) {

         // Does the function dedicate RBP to being a frame ptr?

-        if (RI->hasFP(MF))

+        if (RI->hasFP(MF) || MFI->getReserveFP())

           // If so, don't allocate SP or BP.

           return array_endof(X86_GR16_AO_64) - 1;

         else

@@ -406,7 +408,7 @@ def GR16 : RegisterClass<"X86", [i16], 16,

           return array_endof(X86_GR16_AO_64);

       } else {

         // Does the function dedicate EBP to being a frame ptr?

-        if (RI->hasFP(MF))

+        if (RI->hasFP(MF) || MFI->getReserveFP())

           // If so, don't allocate SP or BP.

           return begin() + 6;

         else

@@ -447,9 +449,10 @@ def GR32 : RegisterClass<"X86", [i32], 32,

       const TargetMachine &TM = MF.getTarget();

       const TargetRegisterInfo *RI = TM.getRegisterInfo();

       const X86Subtarget &Subtarget = TM.getSubtarget<X86Subtarget>();

+      const X86MachineFunctionInfo *MFI = MF.getInfo<X86MachineFunctionInfo>();

       if (Subtarget.is64Bit()) {

         // Does the function dedicate RBP to being a frame ptr?

-        if (RI->hasFP(MF))

+        if (RI->hasFP(MF) || MFI->getReserveFP())

           // If so, don't allocate ESP or EBP.

           return array_endof(X86_GR32_AO_64) - 1;

         else

@@ -457,7 +460,7 @@ def GR32 : RegisterClass<"X86", [i32], 32,

           return array_endof(X86_GR32_AO_64);

       } else {

         // Does the function dedicate EBP to being a frame ptr?

-        if (RI->hasFP(MF))

+        if (RI->hasFP(MF) || MFI->getReserveFP())

           // If so, don't allocate ESP or EBP.

           return begin() + 6;

         else

@@ -484,9 +487,11 @@ def GR64 : RegisterClass<"X86", [i64], 64,

       const TargetMachine &TM = MF.getTarget();

       const TargetRegisterInfo *RI = TM.getRegisterInfo();

       const X86Subtarget &Subtarget = TM.getSubtarget<X86Subtarget>();

+      const X86MachineFunctionInfo *MFI = MF.getInfo<X86MachineFunctionInfo>();

       if (!Subtarget.is64Bit())

         return begin();  // None of these are allocatable in 32-bit.

-      if (RI->hasFP(MF)) // Does the function dedicate RBP to being a frame ptr?

+      // Does the function dedicate RBP to being a frame ptr?

+      if (RI->hasFP(MF) || MFI->getReserveFP())

         return end()-3;  // If so, don't allocate RIP, RSP or RBP

       else

         return end()-2;  // If not, just don't allocate RIP or RSP

@@ -582,8 +587,9 @@ def GR16_NOREX : RegisterClass<"X86", [i16], 16,

     GR16_NOREXClass::allocation_order_end(const MachineFunction &MF) const {

       const TargetMachine &TM = MF.getTarget();

       const TargetRegisterInfo *RI = TM.getRegisterInfo();

+      const X86MachineFunctionInfo *MFI = MF.getInfo<X86MachineFunctionInfo>();

       // Does the function dedicate RBP / EBP to being a frame ptr?

-      if (RI->hasFP(MF))

+      if (RI->hasFP(MF) || MFI->getReserveFP())

         // If so, don't allocate SP or BP.

         return end() - 2;

       else

@@ -604,8 +610,9 @@ def GR32_NOREX : RegisterClass<"X86", [i32], 32,

     GR32_NOREXClass::allocation_order_end(const MachineFunction &MF) const {

       const TargetMachine &TM = MF.getTarget();

       const TargetRegisterInfo *RI = TM.getRegisterInfo();

+      const X86MachineFunctionInfo *MFI = MF.getInfo<X86MachineFunctionInfo>();

       // Does the function dedicate RBP / EBP to being a frame ptr?

-      if (RI->hasFP(MF))

+      if (RI->hasFP(MF) || MFI->getReserveFP())

         // If so, don't allocate ESP or EBP.

         return end() - 2;

       else

@@ -626,8 +633,9 @@ def GR64_NOREX : RegisterClass<"X86", [i64], 64,

     GR64_NOREXClass::allocation_order_end(const MachineFunction &MF) const {

       const TargetMachine &TM = MF.getTarget();

       const TargetRegisterInfo *RI = TM.getRegisterInfo();

+      const X86MachineFunctionInfo *MFI = MF.getInfo<X86MachineFunctionInfo>();

       // Does the function dedicate RBP to being a frame ptr?

-      if (RI->hasFP(MF))

+      if (RI->hasFP(MF) || MFI->getReserveFP())

         // If so, don't allocate RIP, RSP or RBP.

         return end() - 3;

       else

@@ -668,9 +676,10 @@ def GR32_NOSP : RegisterClass<"X86", [i32], 32,

       const TargetMachine &TM = MF.getTarget();

       const TargetRegisterInfo *RI = TM.getRegisterInfo();

       const X86Subtarget &Subtarget = TM.getSubtarget<X86Subtarget>();

+      const X86MachineFunctionInfo *MFI = MF.getInfo<X86MachineFunctionInfo>();

       if (Subtarget.is64Bit()) {

         // Does the function dedicate RBP to being a frame ptr?

-        if (RI->hasFP(MF))

+        if (RI->hasFP(MF) || MFI->getReserveFP())

           // If so, don't allocate EBP.

           return array_endof(X86_GR32_NOSP_AO_64) - 1;

         else

@@ -678,7 +687,7 @@ def GR32_NOSP : RegisterClass<"X86", [i32], 32,

           return array_endof(X86_GR32_NOSP_AO_64);

       } else {

         // Does the function dedicate EBP to being a frame ptr?

-        if (RI->hasFP(MF))

+        if (RI->hasFP(MF) || MFI->getReserveFP())

           // If so, don't allocate EBP.

           return begin() + 6;

         else

@@ -703,9 +712,11 @@ def GR64_NOSP : RegisterClass<"X86", [i64], 64,

       const TargetMachine &TM = MF.getTarget();

       const TargetRegisterInfo *RI = TM.getRegisterInfo();

       const X86Subtarget &Subtarget = TM.getSubtarget<X86Subtarget>();

+      const X86MachineFunctionInfo *MFI = MF.getInfo<X86MachineFunctionInfo>();

       if (!Subtarget.is64Bit())

         return begin();  // None of these are allocatable in 32-bit.

-      if (RI->hasFP(MF)) // Does the function dedicate RBP to being a frame ptr?

+      // Does the function dedicate RBP to being a frame ptr?

+      if (RI->hasFP(MF) || MFI->getReserveFP())

         return end()-1;  // If so, don't allocate RBP

       else

         return end();  // If not, any reg in this class is ok.

@@ -726,8 +737,9 @@ def GR64_NOREX_NOSP : RegisterClass<"X86", [i64], 64,

   {

       const TargetMachine &TM = MF.getTarget();

       const TargetRegisterInfo *RI = TM.getRegisterInfo();

+      const X86MachineFunctionInfo *MFI = MF.getInfo<X86MachineFunctionInfo>();

       // Does the function dedicate RBP to being a frame ptr?

-      if (RI->hasFP(MF))

+      if (RI->hasFP(MF) || MFI->getReserveFP())

         // If so, don't allocate RBP.

         return end() - 1;

       else

@@ -160,6 +160,7 @@ bool X86TargetMachine::addInstSelector(PassManagerBase &PM,

 bool X86TargetMachine::addPreRegAlloc(PassManagerBase &PM,

                                       CodeGenOpt::Level OptLevel) {

+  PM.add(createX86MaxStackAlignmentHeuristicPass());

   return false;  // -print-machineinstr shouldn't print after this.

 }

@@ -955,7 +955,8 @@ static bool ValueIsOnlyUsedLocallyOrStoredToOneGlobal(Instruction *V,

       continue; // Otherwise, storing through it, or storing into GV... fine.

     }

-    if (isa<GetElementPtrInst>(Inst)) {

+    // Must index into the array and into the struct.

+    if (isa<GetElementPtrInst>(Inst) && Inst->getNumOperands() >= 3) {

       if (!ValueIsOnlyUsedLocallyOrStoredToOneGlobal(Inst, GV, PHIs))

         return false;

       continue;